rus
TS_pub
technospheramag
technospheramag
ТЕХНОСФЕРА_РИЦ
Plenary reports
Belous Anatoly I., Saladukha Vitali A.
Microelectronic Component Base of Spacecraft: Status, Problems and Tendencies of Development The article deals with solving the task of enhancing reliability of the onboard electronic equipment of spacecraft at the level of microelectronic components. It highlights the aspects of ensuring the required levels of reliability of the developed national electronic component base, as well as revealing the counterfeit and backdoors when using the imported components and outsourcing during development and fabrication of the electronic component base.
Microelectronic Component Base of Spacecraft: Status, Problems and Tendencies of Development The article deals with solving the task of enhancing reliability of the onboard electronic equipment of spacecraft at the level of microelectronic components. It highlights the aspects of ensuring the required levels of reliability of the developed national electronic component base, as well as revealing the counterfeit and backdoors when using the imported components and outsourcing during development and fabrication of the electronic component base.
Tags: rocket-space equipment; electronic component base; heavy charged электронная компонентная база; тяжелые заряженные частицы; деста
Bobkov Sergei G.
Developing and Manufacturing Integrated Microcircuits for Industrial Application Chips features for industrial application consist in operating conditions, requirements for reliability and the need to support the production of these chips for a long time (up to 20 years). This paper considers the main approaches to designing and producing chips for industrial applications basing on more than 20 years of experience.
Developing and Manufacturing Integrated Microcircuits for Industrial Application Chips features for industrial application consist in operating conditions, requirements for reliability and the need to support the production of these chips for a long time (up to 20 years). This paper considers the main approaches to designing and producing chips for industrial applications basing on more than 20 years of experience.
Tags: chip development chip production system on chip trusted systems доверенные системы производство микросхем разработка микросхем система на кристалле
Tags: database electronic component base (ecb) information resources integrated information space (iis) база данных (бд) информационные ресурсы объединенное информационное пространство (оип) электронная компонентная база (экб)
Korneev Igor L., Egorov Valeryi V.
Problems of Localizing Navigation-communication Equipment. State of Aff airs in the Development of Domestic Receivers and Local Navigation Units The paper deals with problems of localizing navigation-communication equipment. It has been shown that the share of domestic products on the market in 2016 constituted 0.3 %, while in 2009 this share constituted 100 %. Measures provided for domestic products sales support at the level of Russian Federation government regulations have been analyzed. Criteria of localization are provided with indication of priorities in the localization process. The state of affairs in the development of high precision navigation equipment has been examined, in particular, interference resistant local navigation system that is being developed and has a number of advantages over GNSS. The results of tests performed on domestic high precision navigation-communication equipment have been discussed.
Problems of Localizing Navigation-communication Equipment. State of Aff airs in the Development of Domestic Receivers and Local Navigation Units The paper deals with problems of localizing navigation-communication equipment. It has been shown that the share of domestic products on the market in 2016 constituted 0.3 %, while in 2009 this share constituted 100 %. Measures provided for domestic products sales support at the level of Russian Federation government regulations have been analyzed. Criteria of localization are provided with indication of priorities in the localization process. The state of affairs in the development of high precision navigation equipment has been examined, in particular, interference resistant local navigation system that is being developed and has a number of advantages over GNSS. The results of tests performed on domestic high precision navigation-communication equipment have been discussed.
Tags: era-glonass system global navigation satellite systems (gnss) local navigation systems navigation-communication terminals navigation receivers rtk mode tachographs глобальные навигационные спутниковые системы (гнсс) локальные системы навигации навигационно-связные терминалы навигационные приемники режим rtk система эра-глонасс тахографы
Myakotchin Yuri O., Dyakov Oleg N.
Trusted Platform for Developing Scalable Systems for Monitoring and Managing Resources of Social Facilities and “Infosphere” Utilities The research deals with a hardware-software platform designed for developing systems for collecting and processing information obtained from measuring devices and sensors of the housing and communal complex infrastructure. The platform should allow creating information systems that provide: flexible configuration of a distributed network of measuring devices; scalability; extensibility of the functional; security of stored and transmitted information; management of the life cycle of system elements, including secure remote administration and software downloads.
Trusted Platform for Developing Scalable Systems for Monitoring and Managing Resources of Social Facilities and “Infosphere” Utilities The research deals with a hardware-software platform designed for developing systems for collecting and processing information obtained from measuring devices and sensors of the housing and communal complex infrastructure. The platform should allow creating information systems that provide: flexible configuration of a distributed network of measuring devices; scalability; extensibility of the functional; security of stored and transmitted information; management of the life cycle of system elements, including secure remote administration and software downloads.
Tags: mobile application monitoring and resource management system secure data transfer protocols secure microcontroller trusted information system trusted software download utilities web application web приложение доверенная загрузка программного обеспечения доверенная информационная система жкх защищенный микроконтроллер мобильное приложение протоколы безопасной передачи данных система мониторинга и управления ресурсами
Nikiforov A. Y., Telets V. A., Boychenko D. V.
Radiation Hardness Requirements — the Exotica for Gourmets or a Guarantee of the Design Result Success and High Technical Level for all Categories of Consumers? The paper deals with electronic parts ranking based on their radiation hardness category and highlights technical and economical reasons of radiation hardness requirements for all kinds of device types. It has been stated that radiation response characterizes the individual sensitivity of the device functional and parasitic structures set that can be used for device identification. At the same time radiation test data prove the design result existence theorem together with the device technical level for all categories of consumers.
Radiation Hardness Requirements — the Exotica for Gourmets or a Guarantee of the Design Result Success and High Technical Level for all Categories of Consumers? The paper deals with electronic parts ranking based on their radiation hardness category and highlights technical and economical reasons of radiation hardness requirements for all kinds of device types. It has been stated that radiation response characterizes the individual sensitivity of the device functional and parasitic structures set that can be used for device identification. At the same time radiation test data prove the design result existence theorem together with the device technical level for all categories of consumers.
Tags: electronic parts radiation hardness radiation response radiation tests technical requirements радиационная стойкость радиационное воздействие радиационные испытания технические требования электронная компонентная база
Petrosyants Konstantin O.
The Status of Semiconductor Components Modeling With Respect to Thermal and Radiation Eff ects The article highlights the status of TCAD and SPICE modeling of CMOS, SOI CMOS, SiGe BiCMOS VLSI components intended for operation under the influence of radiation (neutrons, electrons, protons, γ- and X-ray, single particle, pulsed radiation), high (up to +300 °C) and low (up to −200 °C) temperatures. TCAD and SPICE models of BJTs and MOSFETs, and methods for determining their parameters have been described. Further directions of TCAD and SPICE modeling of IC components have been considered.
The Status of Semiconductor Components Modeling With Respect to Thermal and Radiation Eff ects The article highlights the status of TCAD and SPICE modeling of CMOS, SOI CMOS, SiGe BiCMOS VLSI components intended for operation under the influence of radiation (neutrons, electrons, protons, γ- and X-ray, single particle, pulsed radiation), high (up to +300 °C) and low (up to −200 °C) temperatures. TCAD and SPICE models of BJTs and MOSFETs, and methods for determining their parameters have been described. Further directions of TCAD and SPICE modeling of IC components have been considered.
Tags: bjt jfet ic components jfet компоненты бис low and high temperature effects model parameter extraction mosfet multi-level modeling radiation effects tcad and spice models tcad и spice модели биполярные влияние высоких и низких температур многоуровневое сквозное моделирование моп радиационные эффекты экстракция параметров моделей
Shelepin Nicolay A.
Features of VLSI Components in Fully-depleted SOI CMOS Technology The article highlights the development of the structures of the components on VLSI technology nodes below 28nm. It has been noted that the 28nm node was the last one to implement planar transistors. Then two directions of three-dimensional transistors formed: FinFET and FD SOI. The paper presents their main differences and features, as well as the results of simulation of the characteristics of SOI transistors with full depletion.
Features of VLSI Components in Fully-depleted SOI CMOS Technology The article highlights the development of the structures of the components on VLSI technology nodes below 28nm. It has been noted that the 28nm node was the last one to implement planar transistors. Then two directions of three-dimensional transistors formed: FinFET and FD SOI. The paper presents their main differences and features, as well as the results of simulation of the characteristics of SOI transistors with full depletion.
Navigationally connected VLSIs and modules
Arkhipov Vladimir A., Arkhipov Alexander V.
Evaluating the Eff ects of Geometric Factors and Distance Between the Antennas Phase Centers on Accuracy of GNSS Attitude Determination of the Satellite Navigation System on the Basis of “Phase” GNSS Receivers The article deals with the results of the HIL simulation phase estimation methods of GNSS attitude determination of UAV based on the modules that support the issuance of the full carrier phase. The factors of the length of the base vector and the values of geometric factor on the integrity, availability and accuracy of issued goniometric solutions have been discussed.
Evaluating the Eff ects of Geometric Factors and Distance Between the Antennas Phase Centers on Accuracy of GNSS Attitude Determination of the Satellite Navigation System on the Basis of “Phase” GNSS Receivers The article deals with the results of the HIL simulation phase estimation methods of GNSS attitude determination of UAV based on the modules that support the issuance of the full carrier phase. The factors of the length of the base vector and the values of geometric factor on the integrity, availability and accuracy of issued goniometric solutions have been discussed.
Tags: global navigation satellite system (gnss) gnss attitude ins/gnss navigation system phase measurements radio navigation attitude and heading reference system strapdown inertial navigation system the geometric factor бесплатформенные инерциальные навигационные системы геометрический фактор глобальные навигационные спутниковые системы (гнсс) интегрированные инерциально-спутниковые навигационные системы радионавигационная курсовертикаль углы пространственного положения фазовые измерения
Dubinko Tatyana Yu.
High-Precision GNSS Navigation Technologies in Vehicle Autopilot Systems The report presents Russiaʼs experience of developing domestic hardware and software for high-precision navigation, as well as ways of their improvement and use as part of precision farming complexes and vehicle autopilot systems.
High-Precision GNSS Navigation Technologies in Vehicle Autopilot Systems The report presents Russiaʼs experience of developing domestic hardware and software for high-precision navigation, as well as ways of their improvement and use as part of precision farming complexes and vehicle autopilot systems.
Tags: autopilot systems global navigation satellite systems high-precision navigation phase technologies высокоточная навигация глобальные навигационные спутниковые системы системы автопилотирования точное земледелие фазовые технологии
Korneev Igor L., Egorov Valeryi V.
Prospects for Application and Further Development of Technical Modules on the Base of DOMESTIC Chipsets The paper considers a local navigation system that is being developed in JSC “Progress” on the base of domestic chipset (ASIC). It also gives a classification of local navigation systems, as well as the system’s features and its advantages over its closest foreign analog. The paper highlights the organization of the system operation, principles of synchronization and methods of combating multipath. It also gives the results of measurement of instrumental position error of the local navigation system.
Prospects for Application and Further Development of Technical Modules on the Base of DOMESTIC Chipsets The paper considers a local navigation system that is being developed in JSC “Progress” on the base of domestic chipset (ASIC). It also gives a classification of local navigation systems, as well as the system’s features and its advantages over its closest foreign analog. The paper highlights the organization of the system operation, principles of synchronization and methods of combating multipath. It also gives the results of measurement of instrumental position error of the local navigation system.
Tags: global navigation satellite systems (gnss) instrumental position error local navigation systems navigation receivers navigation signals глобальные навигационные спутниковые системы (гнсс) инструментальная погрешность локальная система навигации навигационные приемники навигационные сигналы
Kuznetsov Alexander S., Grishin Alexander G., Tatarchyk Ivan A., Grigoryev Ilya D.
Test Bench for LSN Navigation Modules The article gives a detailed description of the test bench for navigation modules of the local navigation system, as well as the design of the nodes of the test bench. Test scenarios for LSN navigation modules have been described.
Test Bench for LSN Navigation Modules The article gives a detailed description of the test bench for navigation modules of the local navigation system, as well as the design of the nodes of the test bench. Test scenarios for LSN navigation modules have been described.
Tags: base stations fpga global navigation satellite systems (gnss) local navigation system prototype of local navigation system transceiver modules базовые станции глобальные навигационные спутниковые системы (гнсс) локальная система навигации макет системы лсн плис приемопередающие модули
Landyshev Sergey V., Klimenko Michael Yu.
Design Principles of Multifrequency GNSS Receiver Based on К1888ВС018 SoC This paper describes the design principles of the multi-frequency high precision GNSS receiver based on К1888ВС018 SoC. The chip is built using a heterogeneous computing architecture and contains NeuroMatrix processor cores and a general-purpose ARM core.
Design Principles of Multifrequency GNSS Receiver Based on К1888ВС018 SoC This paper describes the design principles of the multi-frequency high precision GNSS receiver based on К1888ВС018 SoC. The chip is built using a heterogeneous computing architecture and contains NeuroMatrix processor cores and a general-purpose ARM core.
Tags: arm heterogeneous computing architecture high precision navigation receiver neuromatrix soc к188вс018 геодезический навигационный приемник гетерогенная вычислительная архитектура сбис к188вс018
Tsyplenkov Y. S., Ovchinnikov V. G.
Developing a Prototype of a Synthesizer of Reference Frequencies To detect small-scale low-visible low-flying low-speed targets at short range, one needs a synthesizer of stable frequencies and signals with a minimum level of phase noise, a large dynamic range along the side spectral components and a high speed of frequency tuning. The paper formulates the optimization problem of structural-parametric synthesis, considers the methods for solving it, and determines the basic algorithms for obtaining a general solution of the synthesis problem.
Developing a Prototype of a Synthesizer of Reference Frequencies To detect small-scale low-visible low-flying low-speed targets at short range, one needs a synthesizer of stable frequencies and signals with a minimum level of phase noise, a large dynamic range along the side spectral components and a high speed of frequency tuning. The paper formulates the optimization problem of structural-parametric synthesis, considers the methods for solving it, and determines the basic algorithms for obtaining a general solution of the synthesis problem.
Tags: direct digital synthesis dynamic range by spurious spectral components frequency tuning time indirect synthesis radar station spectral power density of phase noise structural-parametric optimization synthesizer of stable frequencies время перестройки частоты динамический диапазон по побочным спектральным составляющим косвенный синтез прямой цифровой синтез радиолокационная станция синтезатор стабильных частот спектральная плотность мощности фазового шума структурно-параметрическая оптимизация
High-performance computation systems
Bocharov Nikita A., Paramonov Nikolay B., Timofeev Gennady S., Panova Olga Yu.
Performance of Computer Systems With Elbrus-8S Processor for Robotic Systems Tasks The purpose of this work is to research the applicability of computer systems based on Elbrus-8S microprocessor for solving robotic systems tasks. The authors have developed software to simulate the tasks of robot motion control and for processing stereo images and have received temporal characteristics for these models.
Performance of Computer Systems With Elbrus-8S Processor for Robotic Systems Tasks The purpose of this work is to research the applicability of computer systems based on Elbrus-8S microprocessor for solving robotic systems tasks. The authors have developed software to simulate the tasks of robot motion control and for processing stereo images and have received temporal characteristics for these models.
Tags: algorithms of three-dimensional reconstruction high-performance computing systems simulation of motion simulation of stereo-pair алгоритмы трехмерной реконструкции высокопроизводительные вычислительные системы моделирование движения моделирование стереопары
Bychkov Ignat N., Lobanov Igor N.
Automated Electronic Science and Technical Documentation Management System The article consideres main solutions made during realization of an original automated electronic document management system using computer facilities based on “Elbrus” hardware and software platform.
Automated Electronic Science and Technical Documentation Management System The article consideres main solutions made during realization of an original automated electronic document management system using computer facilities based on “Elbrus” hardware and software platform.
Vorobiev Anton S., Bychkov Ignat N.
Solutions for Implementing Multi-chip Processor for Embedded Systems The paper describes the process of implementing a multi-chip processor with the Elbrus architecture for embedded systems. Design solutions are presented and successfully implemented at various design levels — microprocessor, motherboard.
Solutions for Implementing Multi-chip Processor for Embedded Systems The paper describes the process of implementing a multi-chip processor with the Elbrus architecture for embedded systems. Design solutions are presented and successfully implemented at various design levels — microprocessor, motherboard.
Tags: cpu made in russia flip-chip technology ic cover microprocessor case topology placement of passive components крышка микропроцессора отечественный микропроцессор размещение выводов корпуса микропроцессора размещение пассивных компонентов технология flip-chip
Goncharenko Max V., Kulgov Alexey V., Smirnov Sergey Ye.
Future Telecommunication Networks Equipment The paper highlights hybrid software-defined network technology suitable to federal wide area network, and evaluates the required telecom equipment functionality/component base. The results can be used as input data for research and development planning process.
Future Telecommunication Networks Equipment The paper highlights hybrid software-defined network technology suitable to federal wide area network, and evaluates the required telecom equipment functionality/component base. The results can be used as input data for research and development planning process.
Tags: hybrid sdn memory chips. mpls sdn self-organization self-recovery serdes service schema switch fabric trill гибридные сети коммутационные матрицы память приемо-передатчики программно-конфигурируемые сети самовосстановление самоорганизация сериализаторы-десериализаторы
Romanets Yury V., Dudarev Dmitry A., Panasenko Sergey P.
Trusted Boot Module With the Ability of Remote Managing of Servers Trusted boot modules make it possible to control and manage access to computers and their resources as well as to control the integrity of the installed software environment. They are usually based on mechanisms of strong two-factor authentication. Equipping trusted boot modules with server management features allows providing reliable and secure management of servers in client-server architectures.
Trusted Boot Module With the Ability of Remote Managing of Servers Trusted boot modules make it possible to control and manage access to computers and their resources as well as to control the integrity of the installed software environment. They are usually based on mechanisms of strong two-factor authentication. Equipping trusted boot modules with server management features allows providing reliable and secure management of servers in client-server architectures.
Tags: access restriction authentication information protection remote control trusted boot modules апмдз аутентификация защита данных контроль доступа удаленное управление
Kozhin Alexey S.
Analyzing Cache Performance of Elbrus Processors The paper studies cache subsystems of Elbrus-4C and Elbrus-8C processors. It analyzes cache size impact on the single-threaded performance as well as considers the multi-threaded performance scaling of the processors and evaluates the cache performance of the Elbrus-8C processor.
Analyzing Cache Performance of Elbrus Processors The paper studies cache subsystems of Elbrus-4C and Elbrus-8C processors. It analyzes cache size impact on the single-threaded performance as well as considers the multi-threaded performance scaling of the processors and evaluates the cache performance of the Elbrus-8C processor.
Tags: кэш-память многоядерный микропроцессор подсистема памяти производительность пропускная способность кэш-памяти «эльбрус»
Moroz Yaroslav N., Tokarev Dmitriy S.
Features of Cores Topological Planning in Elbrus Highperformance Processors The article presents some methods of VLSI design at the chip level of phisical design of Elbrus microprocessors as well as features of physical design of microprocessors with ELBRUS architecture.
Features of Cores Topological Planning in Elbrus Highperformance Processors The article presents some methods of VLSI design at the chip level of phisical design of Elbrus microprocessors as well as features of physical design of microprocessors with ELBRUS architecture.
Mushkaev Sergey V., Brodyazhenko Andrew V., Bolotnikov Alexander A.
Computing Resources of the Floating Point NeuroMatrix Processors in Processing BIG Data Streams This article is devoted to demonstrating the principles of parallel computing on the processor NM6407 when operating with large data streams. The introductory part of the report considers the structure of the vector node of the NeuroMatrix NM6407 processor with a floating point and reviews, in a schematic form, the computing resources and operating modes of the vector processor with data of different formats. A distributed memory and data bus structure is considered, which ensures the parallelism and high rate of loading of computing nodes. The main part of the report, on the example of the simplest basic problems of linear algebra, demonstrates the behavior of the processor in dynamics. Time diagrams and step-by-step action algorithms have been given. A number of features that need to be considered for a balanced and efficient loading of computational cells in time have been revealed. In particular, the procedure for accessing memory, working with vector registers and interaction between cells has been disclosed. Besides, an approach has been offered to the implementation of more complex algorithms, such as fast Fourier transform. The processor’s performance and efficiency are studied for a different class of tasks.
Computing Resources of the Floating Point NeuroMatrix Processors in Processing BIG Data Streams This article is devoted to demonstrating the principles of parallel computing on the processor NM6407 when operating with large data streams. The introductory part of the report considers the structure of the vector node of the NeuroMatrix NM6407 processor with a floating point and reviews, in a schematic form, the computing resources and operating modes of the vector processor with data of different formats. A distributed memory and data bus structure is considered, which ensures the parallelism and high rate of loading of computing nodes. The main part of the report, on the example of the simplest basic problems of linear algebra, demonstrates the behavior of the processor in dynamics. Time diagrams and step-by-step action algorithms have been given. A number of features that need to be considered for a balanced and efficient loading of computational cells in time have been revealed. In particular, the procedure for accessing memory, working with vector registers and interaction between cells has been disclosed. Besides, an approach has been offered to the implementation of more complex algorithms, such as fast Fourier transform. The processor’s performance and efficiency are studied for a different class of tasks.
Tags: blas fft nm6407 nm6408 parallel computation processor core of digital signal processing (dsp) neuromatrix stream processing vector-matrix multiplication бпф векторно-матричное умножение параллельные вычисления поточная обработка данных процессорное ядро цифровой обработки сигналов neuromatrix
Chernikov Alexander V., Chernikov Vladimir M., Vixne Pavel E., Shelukhin Alexander M
High-performance NMC4 Vector Processor Core for Fixed and Floating Point Calculations The article presents an architecture of high-performance NMC4 processor core that allows connecting vector coprocessors for fixed or floating point calculations to a single controlling RISC-processor. The RISC-core implements control functions, fixed-point scalar data processing and address generation for vector operations. Vector coprocessor for fixed-point calculations is inherited from previous generation of NeuroMatrix processor NMC3 core. The vector coprocessor for floating-point calculations contains data repack unit and up to 8 arithmetic cells. An arithmetic cell contains 8 vector registers (32 × 64 bits) and calculation unit capable of performing up to 8 single precision operations per cycle or up to 2 double precision operations per cycle. NMC4 processor core is designed for high-performance systems-on-chip that can be used as accelerators for supercomputers for neural network applications, radiolocation, video processing. NMC4 core is used inside dual-core 1879ВМ6Я SoC manufactured on 65nm CMOS technology node. One processor core performs floating-point calculations the other — fixed-point calculations. SoC is running on 500MHz and performs up to 16GFLOP/s and up to 112GMAC/s. SoC contain 16 Mbits of internal memory, 32-bit DDR2 interface, 2 communication links with up to 120MB/s throughput each, USB interface, SPI interface, GPIO interface, timers, interrupt controllers and DMA.
High-performance NMC4 Vector Processor Core for Fixed and Floating Point Calculations The article presents an architecture of high-performance NMC4 processor core that allows connecting vector coprocessors for fixed or floating point calculations to a single controlling RISC-processor. The RISC-core implements control functions, fixed-point scalar data processing and address generation for vector operations. Vector coprocessor for fixed-point calculations is inherited from previous generation of NeuroMatrix processor NMC3 core. The vector coprocessor for floating-point calculations contains data repack unit and up to 8 arithmetic cells. An arithmetic cell contains 8 vector registers (32 × 64 bits) and calculation unit capable of performing up to 8 single precision operations per cycle or up to 2 double precision operations per cycle. NMC4 processor core is designed for high-performance systems-on-chip that can be used as accelerators for supercomputers for neural network applications, radiolocation, video processing. NMC4 core is used inside dual-core 1879ВМ6Я SoC manufactured on 65nm CMOS technology node. One processor core performs floating-point calculations the other — fixed-point calculations. SoC is running on 500MHz and performs up to 16GFLOP/s and up to 112GMAC/s. SoC contain 16 Mbits of internal memory, 32-bit DDR2 interface, 2 communication links with up to 120MB/s throughput each, USB interface, SPI interface, GPIO interface, timers, interrupt controllers and DMA.
Malshin Alexander V., Esakov Igor A., Portnova Lyubov A.
Developing DLL-based Clock Synthesizer for “Elbrus” Series Microprocessors The fractional DLL-based frequency synthesizer, presented in this paper, allows changing frequency on the fly without halting the microprocessor. The synthesizer, developed in accordance with 28nm technology for ELBRUS series microprocessors, allows generating up to four operational clock signals with fractional multiplier factor ranging from 1/2 to 2, using high-frequency reference clock.
Developing DLL-based Clock Synthesizer for “Elbrus” Series Microprocessors The fractional DLL-based frequency synthesizer, presented in this paper, allows changing frequency on the fly without halting the microprocessor. The synthesizer, developed in accordance with 28nm technology for ELBRUS series microprocessors, allows generating up to four operational clock signals with fractional multiplier factor ranging from 1/2 to 2, using high-frequency reference clock.
Tags: clock synthesizer digital control phase interpolator pll синтезатор синхросигналов фазовый интерполятор фапч цифровое управление
Tags: control systems of data of mdm-system database electronic component base (ecb) hardware-software complex (hsc) integrated information space (iis) radio-electronic and information technologies (reit) the interdepartmental center of the advancing synergetic technol база данных (бд) межведомственный центр опережающих синергетических технологий (м объединенное информационное пространство (оип) программно-аппаратный комплекс (пак) радиоэлектронныеи информационные технологии (рэит) системы управления данными мдм-системы электронная компонентная база (экб)
Eysymont Alexey L., Chernikov Anton V., Kosorukov Dmitry E., Nasonov Ilya I., Komlev Arseny A.
Heterogeneous Multicore System on Chip With 512Gfl ops Peak Performance This article is devoted to questions and methods of implementing energy efficient heterogeneous and tolerant to memory latency system on chip (SoC) operating at 1GHz frequency, with 512Gflops peak performance and hierarchically organized internal memory. SoC contains sixteen NeuroMatrix NMC4 processor cores and five ARM Cortex-A5.
Heterogeneous Multicore System on Chip With 512Gfl ops Peak Performance This article is devoted to questions and methods of implementing energy efficient heterogeneous and tolerant to memory latency system on chip (SoC) operating at 1GHz frequency, with 512Gflops peak performance and hierarchically organized internal memory. SoC contains sixteen NeuroMatrix NMC4 processor cores and five ARM Cortex-A5.
Tags: digital signal processing embedded computer memory wall problem multicore heterogeneous soc neural networks neuromatrix architecture physical design vector architecture vliw архитектура neuromatrix векторная архитектура встроенный вычислитель многоядерная гетерогенная снк нейронные сети обработка сигналов проблема стены памяти физическое проектирование
Information-management systems
Golovinov Evgeny E., Aminev Dmitri A., Kulakov Victor A., Bakirov Shamil M., Grigoriev Pavel V.
Analysis of System Solutions for Portable Weather Stations The article deals with an analytical review of foreign and domestic patents devoted to weather stations. The brief description of inventions for the last 25 years is given chronologically. The article presents current technology of meteorological measurements, highlighting tendencies of meteorological systems complication and their development by a number of key features.
Analysis of System Solutions for Portable Weather Stations The article deals with an analytical review of foreign and domestic patents devoted to weather stations. The brief description of inventions for the last 25 years is given chronologically. The article presents current technology of meteorological measurements, highlighting tendencies of meteorological systems complication and their development by a number of key features.
Tags: invention measurement patent review weather weather station измерение изобретение метеостанция обзор патент погода
Baskin Vladimir A., Sokolov Igor A., Astashkin Andrey V.
Developing the Autonomic Endocapsule for Screening Diagnostics of Gastrointestinal Tract Capsular endoscopy is a new method capable of changing traditional endoscopy that does not require anesthesia usage. Its advantages are wireless communication and the small size. All the elements are mounted inside a small capsule with an autonomic source of power. The report presents the results of developing microcontroller and endocapsule in general, optical system on the base of CMOS-matrix, specific construction batteries, control stand. The endocapsule prototypes have been manufactured and tested. Images in the gastrointestinal tract simulator in the inherent resolution of 640x480 pix at continuous operating mode during 14 hours have been received.
Developing the Autonomic Endocapsule for Screening Diagnostics of Gastrointestinal Tract Capsular endoscopy is a new method capable of changing traditional endoscopy that does not require anesthesia usage. Its advantages are wireless communication and the small size. All the elements are mounted inside a small capsule with an autonomic source of power. The report presents the results of developing microcontroller and endocapsule in general, optical system on the base of CMOS-matrix, specific construction batteries, control stand. The endocapsule prototypes have been manufactured and tested. Images in the gastrointestinal tract simulator in the inherent resolution of 640x480 pix at continuous operating mode during 14 hours have been received.
Tags: autonomic endocapsule cmos-matrix gastrointestinal tract rf-channel+flash rf-канал+flash автономная эндоскопическая капсула желудочно-кишечный тракт (жкт) кмоп-видеоматрица
Vinogradov Artem N., Terentyev Alexey I., Petrov Oleg V.
Model of Fuzzy Controller for Controlling the Movement of a Mobile Robot The paper presents a model of motion control of a mobile robot based on fuzzy logic, as well as its input/output variables and membership functions. A comparison with a model built on the basis of a classical regulator has been made.
Model of Fuzzy Controller for Controlling the Movement of a Mobile Robot The paper presents a model of motion control of a mobile robot based on fuzzy logic, as well as its input/output variables and membership functions. A comparison with a model built on the basis of a classical regulator has been made.
Tags: fuzzy logic labview mamdani algorithm mobile robot алгоритм мамдани мобильный робот нечеткая логика
Grekov Artem V., Tyurin Sergey F.
Improving FPGA Logic Basing on Increased LUT Bit Capacity and Creating Adaptive Logic Modules Expressions were obtain for estimating the complexity and speed of decomposition of a multi-bit LUT at a lower-order LUT. A comparison of the complexity and delay in the number of transistors was perform for the decomposition of a multi-bit LUT in the computer mathematics Mathcad system. The features of constructing multi-bit LUTs were determined and various variants of decomposition were evaluate with further increase in the LUT dimension with the subsequent choice of the optimal variant of the adaptive logic module.
Improving FPGA Logic Basing on Increased LUT Bit Capacity and Creating Adaptive Logic Modules Expressions were obtain for estimating the complexity and speed of decomposition of a multi-bit LUT at a lower-order LUT. A comparison of the complexity and delay in the number of transistors was perform for the decomposition of a multi-bit LUT in the computer mathematics Mathcad system. The features of constructing multi-bit LUTs were determined and various variants of decomposition were evaluate with further increase in the LUT dimension with the subsequent choice of the optimal variant of the adaptive logic module.
Tags: adaptive logic module alm complexity decomposition fpga logic element lut speed transistor адаптивный логический модуль alm быстродействие декомпозиция логический элемент плис типа fpga сложность транзистор
Gusev Egor V., Stefantsov Alexey V.
Reliable Software Development Technology The article considers reliable on-board software development technology. Proposed technology allows parallel on-board hardware and software development. It includes debug and test instruments to achieve required on-board software reliability.
Reliable Software Development Technology The article considers reliable on-board software development technology. Proposed technology allows parallel on-board hardware and software development. It includes debug and test instruments to achieve required on-board software reliability.
Tags: development technology on-board software reliability бортовое программное обеспечение надежность технология разработки
Sizov Vladimir I., Zosimov Vladislav V., Pereverzev Alexey L., Strekopytov Dmitriy V.
Mathematical Model of Radar Vegetation Clutter The paper presents a model (equivalent generator) of the vegetation clutter. It can be used to evaluate the characteristics of terrestrial monostatic and bistatic radar and communication systems operating in the HF and VHF bands.
Mathematical Model of Radar Vegetation Clutter The paper presents a model (equivalent generator) of the vegetation clutter. It can be used to evaluate the characteristics of terrestrial monostatic and bistatic radar and communication systems operating in the HF and VHF bands.
Tags: radar and communication systems parameter estimation vegetation clutter generator модель (эквивалентный генератор) радиолокационного шума растител оценка параметров систем радио¬локации и связи
Korolev Andrey I., Jirkov Vladislav F., Bolshakov Kirill N., Benevolenskiy Dmitriy V.
Implementinf Polynomial Interpolation Block in Microcircuit for Position Sensor This paper features peculiarities of implementation of special-purpose polynomial algorithm used for interpolation in microcircuit of precise position sensor. Block diagrams and calculation variants for main blocks have been considered. Main parameters and obtained results of implementation in X-Fab XH018 technological basis (180nm) have been provided.
Implementinf Polynomial Interpolation Block in Microcircuit for Position Sensor This paper features peculiarities of implementation of special-purpose polynomial algorithm used for interpolation in microcircuit of precise position sensor. Block diagrams and calculation variants for main blocks have been considered. Main parameters and obtained results of implementation in X-Fab XH018 technological basis (180nm) have been provided.
Tags: digital signal processing high-precision approximation interpolation matlab microcircuit for position sensor polynomials verilog верилог высокоточная аппроксимация интерполяция матлаб микросхема для датчика положения полиномы цифровая обработка сигналов
Liventsev Evgenii V., Silantiev Alexander M., Pavlov Anton N.
Open Platform Based on Processor Core With RISC-V Architecture for Embedded FPGA-based Control Systems This article presents open platform for embedded FPGA-based control systems built on processor core with RISC-V architecture (RV32IM).
Open Platform Based on Processor Core With RISC-V Architecture for Embedded FPGA-based Control Systems This article presents open platform for embedded FPGA-based control systems built on processor core with RISC-V architecture (RV32IM).
Tags: fpga-based systems open platform open software risc-v открытая платформа свободное по системы на плис
Madumarov Talgat A., Stefantsov Alexey V.
Problems of Implementing SystemC Into Existing Process of Virtual Prototyping Hardware and Test Benches for Embedded Software Development SystemC is one of most popular frameworks for virtual prototyping of embedded systems, but it requires a certain toolchain to be used for model usage and verification. This work is about solving problems of implementing SystemC into existing toolchain.
Problems of Implementing SystemC Into Existing Process of Virtual Prototyping Hardware and Test Benches for Embedded Software Development SystemC is one of most popular frameworks for virtual prototyping of embedded systems, but it requires a certain toolchain to be used for model usage and verification. This work is about solving problems of implementing SystemC into existing toolchain.
Tags: c/c++ embedded systems esl-modelling esl-проектирование systemc virtual prototyping виртуальное прототипирование встраиваемые системы
Pavlov Anton N., Liventsev Evgenii V., Silantiev Alexander M.
Remote Hardware and Software Debugging Technology of FPGA-based Systems This paper considers hardware and software development of FPGA-based systems with microprocessor core. The phenomenon under study is increasing software and hardware developers productivity.
Remote Hardware and Software Debugging Technology of FPGA-based Systems This paper considers hardware and software development of FPGA-based systems with microprocessor core. The phenomenon under study is increasing software and hardware developers productivity.
Tags: fpga hardware development hardware/software co-verification microprocessor ip-core open software remote control software development встречная верификация микропроцессорное ядро плис разработка аппаратуры разработка по удаленное управление
Prikhodko Dmitry V., Kurganov Vladislav V., Lyalin Konstantin S., Chistyukhin Victor V.
Methods of Increasing the Effi ciency of the Inner Calibration System for Antenna Arrays Fast algorithm for measuring amplitude-phase errors in active phased antenna arrays based on using pseudo-noise sequences has been introduced earlier [1–4]. Current trend is to use wideband and ultra-wideband signals. In this case it is important to calibrate APAA channels not only on center frequency but within full bandwidth. The paper presents an approach to expanding the use of fast calibrating algorithms to fullbandwidth characterization. Another important part of fast calibrating algorithm is choosing calibrating sequences set. There are two sequence classes — pseudo-nose or orthogonal. When using pseudo-noise calibrating sequences there are no strict requirements to timing synchronization but measurements have additional error due to mutual interference between sequences in one set. Decorrelation method canceling this error is introduced in this paper, so pseudo-noise sequences can be used with comparable accuracy as orthogonal sequences.
Methods of Increasing the Effi ciency of the Inner Calibration System for Antenna Arrays Fast algorithm for measuring amplitude-phase errors in active phased antenna arrays based on using pseudo-noise sequences has been introduced earlier [1–4]. Current trend is to use wideband and ultra-wideband signals. In this case it is important to calibrate APAA channels not only on center frequency but within full bandwidth. The paper presents an approach to expanding the use of fast calibrating algorithms to fullbandwidth characterization. Another important part of fast calibrating algorithm is choosing calibrating sequences set. There are two sequence classes — pseudo-nose or orthogonal. When using pseudo-noise calibrating sequences there are no strict requirements to timing synchronization but measurements have additional error due to mutual interference between sequences in one set. Decorrelation method canceling this error is introduced in this paper, so pseudo-noise sequences can be used with comparable accuracy as orthogonal sequences.
Tags: antenna arrays inner calibration system phased array антенная решетка система внутренней калибровки фазированная антенная решетка
Rakov Alexander V., Sobchenko Maxim I., Dumchikov K. A., Zhukov V. V., Ukhandeev Vladimir I.
Automatic System for Characterizing High-Frequency Printed Circuit Board Materials The article highlights main principles of designing the automation system for the characterization of dielectric materials, as well as methods of dielectric characterization, the structure and description of the measurement setup, the functional principles of the specialized software as steps of the system development.
Automatic System for Characterizing High-Frequency Printed Circuit Board Materials The article highlights main principles of designing the automation system for the characterization of dielectric materials, as well as methods of dielectric characterization, the structure and description of the measurement setup, the functional principles of the specialized software as steps of the system development.
Tags: dielectric characterization dielectric substrate measurements automation printed circuit boards test vehicle автоматизация измерений диэлектрическая подложка измерения параметров диэлектрика измерительная ячейка печатная плата
Suvorova Elena A., Rozanov Valentin V., Sheynin Yuriy E.
Dynamically Reconfi gurable Systems and Networks on a Chip in ASIC in 2D-3D Technologies Reconfigurable SoC may be applied to adapt system characteristics to new functionality, or new application domain. The report considers capabilities of SoC and NoC dynamic reconfiguration implemented in ASIC with 2.5D and 3D technologies.
Dynamically Reconfi gurable Systems and Networks on a Chip in ASIC in 2D-3D Technologies Reconfigurable SoC may be applied to adapt system characteristics to new functionality, or new application domain. The report considers capabilities of SoC and NoC dynamic reconfiguration implemented in ASIC with 2.5D and 3D technologies.
Tags: 2.5d technology 2.5d технология 3d technology 3d технология reconfigurable soc soc реконфигурируемая снк снк
Tarabarov Pavel A., Eremeev Petr M., Grishin Vyacheslav Yu.
Unifi ed Control Computing System for Space Applications The article considers a unified control computing system intended for operation as part of on-board control systems for advanced space vehicles. The proposed computer system is designed on the basis of the standard SpaceVPX for building space systems, and also has the functions of automatic reconfiguration and software and hardware support of mutual agreement.
Unifi ed Control Computing System for Space Applications The article considers a unified control computing system intended for operation as part of on-board control systems for advanced space vehicles. The proposed computer system is designed on the basis of the standard SpaceVPX for building space systems, and also has the functions of automatic reconfiguration and software and hardware support of mutual agreement.
Tags: automatic reconfiguration mutual agreement spacevpx spacevpx standard spacewire unified control computer system автоматическая реконфигурация взаимное информационное согласование унифицированная управляющая вычислительная система
Techologies and micro- and nanoelectronics components
Avakaw Syarhei M., Plebanovich Vladimir I.
Maskless Lithography Alongside mass production, there is a growing necessity for individual approach to IC fabrication. The IC production process which has been developing for decades does not imply piece production. The existence of photomasks means repeated fabrication of the same item. The emergence of multi-beam scanning pattern generators has made it possible to adopt maskless lithography process.
Maskless Lithography Alongside mass production, there is a growing necessity for individual approach to IC fabrication. The IC production process which has been developing for decades does not imply piece production. The existence of photomasks means repeated fabrication of the same item. The emergence of multi-beam scanning pattern generators has made it possible to adopt maskless lithography process.
Tags: laser pattern generator maskless lithography photolithography simulation безмасковая литография лазерный генератор изображений моделирование фотолитография
Sidorenko Vitaliy N., Vertyanov Denis V., Dolgovykh Yuriy G., Kovalev Anatoliy A., Zmeev Sergey V., Timoshenkov Sergey P.
Design and Technological Peculiarities of Flip-chip Mounting in the Production of Highly Integrated 2.5D and 3D Microassemblies The article describes advantages of flip-chip mounting technology application in a die creation of 2,5D and 3D modification microassemblies. Design and technological features and restrictions of flip-chip die mounting in the manufacture of high-integrated microassemblies are presented. The structure profile estimate results of unpackaged microcircuit surface with microbamps are given. Also the article gives bump profiles after their mounting on the bonding pads of test chips. The shear strength results of the SAC305 bumps from bonding pads with Au-coated dies and from bonding pads with ImmSn-coated silicon substrates are presented in the research.
Design and Technological Peculiarities of Flip-chip Mounting in the Production of Highly Integrated 2.5D and 3D Microassemblies The article describes advantages of flip-chip mounting technology application in a die creation of 2,5D and 3D modification microassemblies. Design and technological features and restrictions of flip-chip die mounting in the manufacture of high-integrated microassemblies are presented. The structure profile estimate results of unpackaged microcircuit surface with microbamps are given. Also the article gives bump profiles after their mounting on the bonding pads of test chips. The shear strength results of the SAC305 bumps from bonding pads with Au-coated dies and from bonding pads with ImmSn-coated silicon substrates are presented in the research.
Tags: bump die flip-chip mounting flip-chip монтаж microassembly silicon substrate underfill заливка компаунда под кристалл кристалл микросборка подложка из кремния шариковый вывод
Kondrashov Vladimir V., Chapkin Vyacheslav V., Lukashenkov Anatoly V., Kopylov Andrey V., Seredin Oleg S.
Building a Simulation and Control System for the Process of Laser Trimming of Film Resistors in Microelectronics The report highlights the process of building a simulation and control system for the process of laser trimming of film resistors based on mesh circuit models and machine vision methods and gives a detailed description of approaches to the solution of problems arising during automation of the trimming process.
Building a Simulation and Control System for the Process of Laser Trimming of Film Resistors in Microelectronics The report highlights the process of building a simulation and control system for the process of laser trimming of film resistors based on mesh circuit models and machine vision methods and gives a detailed description of approaches to the solution of problems arising during automation of the trimming process.
Tags: development of control algorithms image analysis laser trimming of resistors machine vision resistor’s electrophysical parameters calculation анализ изображений лазерная подгонка резисторов расчет электрофизических параметров резисторов синтез алгоритмов управления процессом подгонки техническое зрение
Bykov Alexander V., Vysokikh Yury E., Kartavtsev Vladimir S., Krasnoborodko Sergey Yu.
Requirements for Engineering Infrastructure of Microand Nanoelectronic Components Production When designing modern production of micro- and nanoelectronic components, it is necessary to take into account a number of requirements on which the proper operation of engineering systems and the possibility of creating production depend.
Requirements for Engineering Infrastructure of Microand Nanoelectronic Components Production When designing modern production of micro- and nanoelectronic components, it is necessary to take into account a number of requirements on which the proper operation of engineering systems and the possibility of creating production depend.
Tags: clean rooms deionized water micro- and nanoelectronic components microclimate process gases деионизованная вода микро- и наноэлектронные компоненты микроклимат технологические газы чистые производственные помещения
Volkov Svyatoslav I., Bobkov Sergey G., Krasnyuk Andrey A.
Test Structures for Microprocessor Systems for High-temperature Microelectronics SOI CMOS technology has an absolute advantage over wide band gap semiconductors, memory cells like MRAM and FRAM especially for the development of super-large-scale integrated circuits of memory, microprocessors and systems on a chip for maximum operating temperatures up to 250–300 °C. In the work, I–V characteristic of transistors, switching and time characteristics of trigger memories and ring generators were investigated. A series of experiments was also carried out to study the influence of the temperature on the transistors and design techniques. Based on the data we have investigated, it is shown that a temperature change up to 250 °C causes not only an increase in leakage currents by 3–4 orders of magnitude, but also the impact ionization and the kink effect. Experimental studies of ring generators have shown that when the temperature varies from 25 ° C to 200 °C, the generation frequency decreases by a factor of 1.5, the static current of consumption increases by three orders of magnitude (up to 0,5 μA), and the dynamic current of consumption increases by 40 %.The research of test structures of trigger memory elements, showed unconditional shift to the left with decreasing critical points for families of switching characteristics. In general, the noise immunity of memory cells in the investigated temperature range varies insignificantly — up to 10 %, which makes it possible to conclude that it is possible to build static memory blocks in high-temperature microprocessors without fundamental changes in circuitry. So on, the conclusion is made on the principle possibility of creating microprocessor systems based on the developed circuit elements for operating temperatures up to 300 °C.
Test Structures for Microprocessor Systems for High-temperature Microelectronics SOI CMOS technology has an absolute advantage over wide band gap semiconductors, memory cells like MRAM and FRAM especially for the development of super-large-scale integrated circuits of memory, microprocessors and systems on a chip for maximum operating temperatures up to 250–300 °C. In the work, I–V characteristic of transistors, switching and time characteristics of trigger memories and ring generators were investigated. A series of experiments was also carried out to study the influence of the temperature on the transistors and design techniques. Based on the data we have investigated, it is shown that a temperature change up to 250 °C causes not only an increase in leakage currents by 3–4 orders of magnitude, but also the impact ionization and the kink effect. Experimental studies of ring generators have shown that when the temperature varies from 25 ° C to 200 °C, the generation frequency decreases by a factor of 1.5, the static current of consumption increases by three orders of magnitude (up to 0,5 μA), and the dynamic current of consumption increases by 40 %.The research of test structures of trigger memory elements, showed unconditional shift to the left with decreasing critical points for families of switching characteristics. In general, the noise immunity of memory cells in the investigated temperature range varies insignificantly — up to 10 %, which makes it possible to conclude that it is possible to build static memory blocks in high-temperature microprocessors without fundamental changes in circuitry. So on, the conclusion is made on the principle possibility of creating microprocessor systems based on the developed circuit elements for operating temperatures up to 300 °C.
Tags: high-temperature microelectronics ip cores layout vlsi microprocessors soi cmos высокотемпературная электроника микропроцессоры топология сбис
Maryina Elena V., Imametdinov Emil F., Krasnyuk Andrey A.
Multigate Mosfet Model With a Quantum Dot in the Channel The results of the research of the reference model for SGMOS (split gate MOS) are presented. It is shown that the use of a split gate is quite effective in modulation-doped structures with the periodically doped channel. Decrease in the steepness, speed, and change in the I–V characteristic of transistor structures is not catastrophic, up to temperatures of 200–250 °C.
Multigate Mosfet Model With a Quantum Dot in the Channel The results of the research of the reference model for SGMOS (split gate MOS) are presented. It is shown that the use of a split gate is quite effective in modulation-doped structures with the periodically doped channel. Decrease in the steepness, speed, and change in the I–V characteristic of transistor structures is not catastrophic, up to temperatures of 200–250 °C.
Tags: mos structures periodically doped channel split gate мдп транзисторные структуры периодически легированный канал расщепленный затвор
Lebedev Anton O., Ivanov Sergey V., Voronov Daniil D., Orlov Oleg M.
Studying the Problems of HfO2 ReRAM Cell Characteristics Repeatability and Reproducibility This paper presents experimental data demonstrating the problem of the repeatability and reproducibility of electrophysical characteristics of ReRAM cells. An overview of methods for improving the stability of the characteristics will also be presented, and an analysis will be made of their applicability to the available memory samples. Some circuit and structural approaches to improving the stability of characteristics will be proposed.
Studying the Problems of HfO2 ReRAM Cell Characteristics Repeatability and Reproducibility This paper presents experimental data demonstrating the problem of the repeatability and reproducibility of electrophysical characteristics of ReRAM cells. An overview of methods for improving the stability of the characteristics will also be presented, and an analysis will be made of their applicability to the available memory samples. Some circuit and structural approaches to improving the stability of characteristics will be proposed.
Tags: hafnium oxide non-volatile memory reram resistive memory оксид гафния резистивная память энергонезависимая память
Krasnikov Gennady Ya., Gushchin Oleg P., Litavrin Mikhail V., Gornev Evgeny S.
Complementary Methods of Enhancing Resolution of Optical Lithography The DSA method, its basic principles and actual problems have been considered. The ML2 method and its actual problems have also been considered. The prospect of complementary methods for Russian microelectronics has been grounded.
Complementary Methods of Enhancing Resolution of Optical Lithography The DSA method, its basic principles and actual problems have been considered. The ML2 method and its actual problems have also been considered. The prospect of complementary methods for Russian microelectronics has been grounded.
Tags: chemoepitaxy directed self-assembly (dsa) dsa) euv-литография (extreme ultraviolet) extreme ultraviolet lithography (euv) graphoepitaxy ml2) multi-beam electron lithography (ml2) графоэпитаксия многолучевая электронная литография (multi-beam electron lithogr направленная самосборка (directed self-assembly хемоэпитаксия
Vlasov Andrey I., Mileshin Sergey A., Tsivinskaya Tatyana A.
Analyzing Sensors Silicon Crystals Defects and Production Technologies The paper presents possible problems of the current production of crystals for creating sensitive elements of systems of sensors from single-crystal silicon. It highlights various methods of development taking into account real technological restrictions of structures for high-precision instruments of physical quantities measurement. The defects of a crystal lattice appearing during sensitive elements production and their impact on characteristics of control and measuring sensors have been analyzed, and standard schemes of touch elements production have been considered.
Analyzing Sensors Silicon Crystals Defects and Production Technologies The paper presents possible problems of the current production of crystals for creating sensitive elements of systems of sensors from single-crystal silicon. It highlights various methods of development taking into account real technological restrictions of structures for high-precision instruments of physical quantities measurement. The defects of a crystal lattice appearing during sensitive elements production and their impact on characteristics of control and measuring sensors have been analyzed, and standard schemes of touch elements production have been considered.
Tags: control and measuring sensor crystal lattice elastic deformations microdefects sensitive element single-crystal silicon контрольно-измерительный сенсор кристаллическая решетка микродефекты монокристаллический кремний упругие деформации чувствительный элемент
Moskovskaya Yulia M., Nikiforov Alexander Yu., Bobrovskiy Dmitry V., Ulanova Anastasiya V., Zhukov A. A.
Estimating the Infl uence of Parameters of the Critical Operations of a Typical CMOS Process on TID Hardness of IC The influence of 1,5mm CMOS process parameters (mainly gate oxide growth temperature) variations on the total ionizing dose effects is comparatively analyzed in experiment on test structures. It has been experimentally demonstrated that for CMOS processes with gate oxide thickness about 300 Å the TID hardness is obtained in 850–900 °C gate oxide growth temperature range.
Estimating the Infl uence of Parameters of the Critical Operations of a Typical CMOS Process on TID Hardness of IC The influence of 1,5mm CMOS process parameters (mainly gate oxide growth temperature) variations on the total ionizing dose effects is comparatively analyzed in experiment on test structures. It has been experimentally demonstrated that for CMOS processes with gate oxide thickness about 300 Å the TID hardness is obtained in 850–900 °C gate oxide growth temperature range.
Tags: cmos integrated circuits gate oxide growing process temperature manufacturing process tid hardness дозовая стойкость кмоп ис процесс производства процесс формирования подзатворного окисла температура
Nagnoynyy Vladimir A., Baranov Gleb V.
Method for Forming Dielectric Isolated FinFET An original method of forming the dielectric insulation of FinFET has been presented. It consists in the formation of a local buried dielectric region at the base of the transistor body. A technological solution for the implementation of this method compatible with the CMOS VLSI production technology has been proposed, and experimental results of technological processes have been presented.
Method for Forming Dielectric Isolated FinFET An original method of forming the dielectric insulation of FinFET has been presented. It consists in the formation of a local buried dielectric region at the base of the transistor body. A technological solution for the implementation of this method compatible with the CMOS VLSI production technology has been proposed, and experimental results of technological processes have been presented.
Tags: isolation finfet local isolation punch-through leakage current изоляция finfet локальная изоляция ток утечки смыкания опз
Sapeghin Alexander A., Barabanenkov Mikhail Yu., Italyantsev Alexander G.
Waveguides Integrated Into Microelectronic Structures Using Discrete Nano-sized Elements The report presents the results of theoretical calculations of the frequency dependence of the eigenmodes, their widths, Q-factor of discrete resonators consisting of a single or a few metal nanoparticles on their mutual arrangement, shape and size. Frequency filtering properties of a finite linear chain of gold nanoparticles in the visible wavelength range have been investigated.
Waveguides Integrated Into Microelectronic Structures Using Discrete Nano-sized Elements The report presents the results of theoretical calculations of the frequency dependence of the eigenmodes, their widths, Q-factor of discrete resonators consisting of a single or a few metal nanoparticles on their mutual arrangement, shape and size. Frequency filtering properties of a finite linear chain of gold nanoparticles in the visible wavelength range have been investigated.
Tags: eigenmode frequency filter mie scattering nanoparticle cluster q-factor resonator добротность кластер наночастиц рассеяние ми резонатор собственная мода частотный фильтр
Sivchenko Alexander S., Kuznetsov Evgeniy V.
Determining Main Reliability Parameters for Semiconductor Foundry CMOS Process This paper presents a reliability assessment approach to the CMOS IC technology. In this regard, test chips with a set of test structures have been developed and manufactured using 65nm technology, research techniques and automated measurement programs on the basis thereof have been worked out. Techniques allow estimating the gate insulator quality for MOS transistors as well as their tolerance to hot carrier influence and to parameter changes caused by high temperature at negative voltage. The hardness of metallization buses and contact vias to electromigration has also been analyzed. The presented approach can be used at CMOS IC manufacturing plants to provide quality control of fabrication processes responsible for CMOS IC main reliability characteristics; it may also be used by design centers for the reliability assessment of semiconductor plant technology.
Determining Main Reliability Parameters for Semiconductor Foundry CMOS Process This paper presents a reliability assessment approach to the CMOS IC technology. In this regard, test chips with a set of test structures have been developed and manufactured using 65nm technology, research techniques and automated measurement programs on the basis thereof have been worked out. Techniques allow estimating the gate insulator quality for MOS transistors as well as their tolerance to hot carrier influence and to parameter changes caused by high temperature at negative voltage. The hardness of metallization buses and contact vias to electromigration has also been analyzed. The presented approach can be used at CMOS IC manufacturing plants to provide quality control of fabrication processes responsible for CMOS IC main reliability characteristics; it may also be used by design centers for the reliability assessment of semiconductor plant technology.
Tags: defectiveness fault hot carriers ic metallization mos transistor reliability test structures горячие носители дефектность металлизация ис моп транзистор надежность отказ тестовые структуры
Sleptsov Evgeniy V., Chernykh Alexey V., Chernykh Sergey V., Sleptsova Anastasia A., Kondratiev Evgeniy S., Gladysheva Nadezhda B., Dorofeyev Alexey A., Didenko Sergey I.
Studying Ni/Au, Mo/Au and Re/Au Schottky Barriers on AlGaN/GaN Heterostructures The present work investigates the influence of annealing at temperatures ranging from 300 to 650 °C on Schottky barrier parameters and leakage current of Ni/Au, Mo/Au and Re/Au Schottky barriers on AlGaN/GaN heterostructures.
Studying Ni/Au, Mo/Au and Re/Au Schottky Barriers on AlGaN/GaN Heterostructures The present work investigates the influence of annealing at temperatures ranging from 300 to 650 °C on Schottky barrier parameters and leakage current of Ni/Au, Mo/Au and Re/Au Schottky barriers on AlGaN/GaN heterostructures.
Tags: defectiveness fault hot carriers ic metallization mos transistor reliability test structures барьер шоттки гетероструктура algan/gan термический отжиг токи утечки транзистор с высокой подвижностью электронов тугоплавкие металлы
Soldatenkov Fedor Yu., Kozlov Vladimir A.
Technology of Liquid Phase Epitaxy for Power Electronics Based on Multilayer GaAs-(III-V) Heterostructure Growth The paper considers the main features of liquid-phase epitaxy method for high-voltage heterostructure growth on the base of GaAs solid solutions considered, as well as some examples of power and pulse power devices with subnanosecond switching speed and with switching frequency of 10MHz and above.
Technology of Liquid Phase Epitaxy for Power Electronics Based on Multilayer GaAs-(III-V) Heterostructure Growth The paper considers the main features of liquid-phase epitaxy method for high-voltage heterostructure growth on the base of GaAs solid solutions considered, as well as some examples of power and pulse power devices with subnanosecond switching speed and with switching frequency of 10MHz and above.
Tags: gallium arsenide hetero-junction p-i-n-structure liquid phase epitaxial growth misfit dislocation p-i-n-структуры с гетеропереходами pulsed power devices арсенид галлия дислокации несоответствия жидкофазная эпитаксия приборы импульсной силовой электроники
Baranov Yuriy N., Schwartz Karl-Heinrich M., Sokolov Evgeniy M., Statsenko Vladimir N., Fedotov Sergey D., Tarasov Dmitry V., Timoshenkov Sergey P.
Atmospheric Pressure Chloride Transport in Epitaxial System The paper presents the results of development and studies of the epitaxial silicon layers formation obtained by using a chloride gas transport (CVT) in the sandwich system. It deals with the formation of single- and polycrystalline layers on different silicon substrates as well as on epitaxial wafers of “silicon with dielectric isolation” (EPIC). We have researched the temperature distribution in the sandwich system and the thickness of epitaxial layer at the area of substrates, as well as the dependence of layer growth rate to the temperature of source-wafer and substrate, Cl/H ratio and magnitude of the gap between wafers in the sandwich system. The growth rate of polycrystalline layers on EPIC reaches 12µm/min when the thickness of layers is 300–600µm, of single-crystal Si layers on a silicon wafer being 8–10µm/min when the thickness of layers is 40–100µm. The most significant feature of CVT process from a practical point of view is that during the formation of epitaxial layers as a source of silicon, we can use discarded wafers and structures after various cycles of epitaxial fabrication. The transfer mechanism allows creating single crystal epitaxial layers with a growth rate about 10µm/min, regardless of the source-wafer structural quality and polycrystalline support layers, which significantly reduces the cost of manufacturing process.
Atmospheric Pressure Chloride Transport in Epitaxial System The paper presents the results of development and studies of the epitaxial silicon layers formation obtained by using a chloride gas transport (CVT) in the sandwich system. It deals with the formation of single- and polycrystalline layers on different silicon substrates as well as on epitaxial wafers of “silicon with dielectric isolation” (EPIC). We have researched the temperature distribution in the sandwich system and the thickness of epitaxial layer at the area of substrates, as well as the dependence of layer growth rate to the temperature of source-wafer and substrate, Cl/H ratio and magnitude of the gap between wafers in the sandwich system. The growth rate of polycrystalline layers on EPIC reaches 12µm/min when the thickness of layers is 300–600µm, of single-crystal Si layers on a silicon wafer being 8–10µm/min when the thickness of layers is 40–100µm. The most significant feature of CVT process from a practical point of view is that during the formation of epitaxial layers as a source of silicon, we can use discarded wafers and structures after various cycles of epitaxial fabrication. The transfer mechanism allows creating single crystal epitaxial layers with a growth rate about 10µm/min, regardless of the source-wafer structural quality and polycrystalline support layers, which significantly reduces the cost of manufacturing process.
Tags: chloride vapor transport cvt epic gas-transport epitaxy mems polycrystalline silicon sandwich-system single crystalline silicon газотранспортная эпитаксия газотранспортный перенос ксди монокристаллический кремний мэмс поликристаллический кремний сэндвич-система хлоридный процесс
Tags: atomic layer deposition ferroelectricity hafnium oxide non-volatile memory orthorhombic phase. thin films атомно-слоевое осаждение оксид гафния орторомбическая фаза сегнетоэлектричество тонкие пленки энергонезависимая память
Chetverikov Vladimir A., Baranov Gleb V., Italyantsev Alexander G.
Shaping Silicon Fins of Minimal Dimensions in FinFETs by Nonlithographic Method The report presents the results of solid-phase trimming of silicon Fins in Ti-Si system and analyses the methods of forming titanium film on the side surface of Fins. Optimal parameters of silicide formation for the purpose of trimming have been determined.
Shaping Silicon Fins of Minimal Dimensions in FinFETs by Nonlithographic Method The report presents the results of solid-phase trimming of silicon Fins in Ti-Si system and analyses the methods of forming titanium film on the side surface of Fins. Optimal parameters of silicide formation for the purpose of trimming have been determined.
Microelectronics products of general and dedicated purposes
Galimov Arthur M.
Compact Modeling of Soft Error Rates: From Proton Testing Data to Heavy Ions Induced Rates and Vice Versa Based on compact model a soft error rates calculation technique is presented. The method allows to convert the proton cross-section data to the heavy ion induced error rates and vice versa. The verification of proposed technique is presented.
Compact Modeling of Soft Error Rates: From Proton Testing Data to Heavy Ions Induced Rates and Vice Versa Based on compact model a soft error rates calculation technique is presented. The method allows to convert the proton cross-section data to the heavy ion induced error rates and vice versa. The verification of proposed technique is presented.
Tags: cots memory devices heavy ions protons soft error rates коммерческие интегральные микросхемы (имс) памяти протоны тяжелые заряженные частицы частоты сбоев
Bobkov Sergey G., Vlasov Alexander O., Gorelov Andrey A., Emin Evgeniy K.
Features of 28nm TSMC Physical and Logical VLSI Design Flow This work describes the analysis of the specific features of TSMC 28HPC+ library cells. Cell-based synthesis design flow and topological design flow is being considered with account of obtained results.
Features of 28nm TSMC Physical and Logical VLSI Design Flow This work describes the analysis of the specific features of TSMC 28HPC+ library cells. Cell-based synthesis design flow and topological design flow is being considered with account of obtained results.
Tags: cadence circuit synthesis route of design topological design tsmc 28nm tsmc 2 — m vlsi маршрут проектирования сбис схемотехнический синтез топологическое проектирование
Ilin Sergey A.
Developing Characterization Flow of Specialized Logic Gates to Improve the Accuracy of the Performance Evaluation in Reconfi gurable FPGA The article describes briefly the specialized logic gates used in FPGAs. Values of the valves influence on the speed have been given. The approach to the flow of specialized logic gates characterization in reconfigurable FPGAs has been proposed.
Developing Characterization Flow of Specialized Logic Gates to Improve the Accuracy of the Performance Evaluation in Reconfi gurable FPGA The article describes briefly the specialized logic gates used in FPGAs. Values of the valves influence on the speed have been given. The approach to the flow of specialized logic gates characterization in reconfigurable FPGAs has been proposed.
Kulikov Dmitry V., Savelyev Denis I.
Features of Mismatch Eff ects on Parameters of High-Speed Time-Interleaved Multichannel ADCs The paper is devoted to special types of distortions in the spectrum of output signal of multichannel ADCs caused by mismatch of parameters of the channels used. The influence of the factors limiting the achievement of high dynamic characteristics has been investigated
Features of Mismatch Eff ects on Parameters of High-Speed Time-Interleaved Multichannel ADCs The paper is devoted to special types of distortions in the spectrum of output signal of multichannel ADCs caused by mismatch of parameters of the channels used. The influence of the factors limiting the achievement of high dynamic characteristics has been investigated
Larionov A. V., Buyakova O. N., Sysoeva O. V.
A High-speed Receiver With Adaptive Auxiliary Clock for High Loss Backplane Channels The paper presents a technique that allows finding the optimal position of the phase auxiliary clock signal of the receiver. Based on this technique, the controller has been implemented and integrated into the receiver. The simulation results have shown an increase in the opening of eye diagram by 1.8 % of the unit interval horizontally and 38мВ vertically for 10Gb/s data stream passed through the channel with attenuation −23dB at a frequency 5GHz. The receiver is designed in CMOS 65nm technology and operates from the power source 1V.
A High-speed Receiver With Adaptive Auxiliary Clock for High Loss Backplane Channels The paper presents a technique that allows finding the optimal position of the phase auxiliary clock signal of the receiver. Based on this technique, the controller has been implemented and integrated into the receiver. The simulation results have shown an increase in the opening of eye diagram by 1.8 % of the unit interval horizontally and 38мВ vertically for 10Gb/s data stream passed through the channel with attenuation −23dB at a frequency 5GHz. The receiver is designed in CMOS 65nm technology and operates from the power source 1V.
Tags: decision-feedback equalizer equalizer receiver sign-sign least mean square transceiver бинарный алгоритм наименьших средних квадратов приемник приемопередатчик решающая обратная связь эквалайзер
Matveev Dmitriy V.
Peculiarities of Developing Low-power ADC With Successive Approximation Register This work examines an approach for designing low-power analog-to-digital converters with successive approximation register, as well as offers the implementation of successive approximation register for ADC with maximal digital capacity of 12 bits using 65nm TSMC technology.
Peculiarities of Developing Low-power ADC With Successive Approximation Register This work examines an approach for designing low-power analog-to-digital converters with successive approximation register, as well as offers the implementation of successive approximation register for ADC with maximal digital capacity of 12 bits using 65nm TSMC technology.
Tags: adc with successive approximation register designing low-power circuits ацп последовательного приближения проектирование малопотребляющих схем
Novozhilov E. A.
Implementing SpaceWire Interface in Microprocessors Manufactured by SRISA RAS for Space Applications Reported building blocks for SpaceWire interface in family of chips for space applications, developed by SRISA.
Implementing SpaceWire Interface in Microprocessors Manufactured by SRISA RAS for Space Applications Reported building blocks for SpaceWire interface in family of chips for space applications, developed by SRISA.
Nuykin Andrey V., Kravtsov Alexander S.
Using RFID Technology in the IoT Ecosystem The report considers application of RFID technologies for industrial and consumer Internet of Things (IoT) and gives the market review and the forecast of growth of IoT devices. Particular attention is paid to the use of RFID technologies in smart city systems, smart transport, smart home, portable and wearable devices.
Using RFID Technology in the IoT Ecosystem The report considers application of RFID technologies for industrial and consumer Internet of Things (IoT) and gives the market review and the forecast of growth of IoT devices. Particular attention is paid to the use of RFID technologies in smart city systems, smart transport, smart home, portable and wearable devices.
Tags: internet of things iot nfc rfid smart cards интернет вещей радиочастотная идентификация смарт-карты
Tyurin Sergey F., Goncharovskiy Oleg V., Prokhorov Andrey S.
A Fault Tolerant Vote Circuit Reliability means and radiation resistance of digital equipment. For aerospace computer systems is extremely urgent to develop radiation-resistant components. One way to ensure the radiation resistance is the creation of a special architecture — RHBD (Radiation Hardened by Design). This approach includes triple redundancy (Triple Modular Redundancy — TMR) to reduce radiation-induced switching of logic elements (Single Event Transients — SET) and memory elements (Single Event Upset — SEU). FPGA due to the large number of elements configuration memory is not vulnerable to the effects of radiation. Therefore, one-time programmable devices are used, for example, the companies Actel, but flip-flops tripled too. Nevertheless, in the SRAM configurable FPGA Virtex (Xilinx) used triple redundancy with Majority Vote Circuit based on a tristate buffer instead LUT. Such Voter has implementation features that are explored in the article. One of the variants of majority voter for the pins of the FPGA using a minority voting function. Only in this case, no conflict of signals at the outputs of buffers. Describes CMOS implementation of the voters. The paper proposes a fault tolerant CMOS implementation of the Majority Voter and Minority Voter in order to improve reliability and FPGA radiation resistance.
A Fault Tolerant Vote Circuit Reliability means and radiation resistance of digital equipment. For aerospace computer systems is extremely urgent to develop radiation-resistant components. One way to ensure the radiation resistance is the creation of a special architecture — RHBD (Radiation Hardened by Design). This approach includes triple redundancy (Triple Modular Redundancy — TMR) to reduce radiation-induced switching of logic elements (Single Event Transients — SET) and memory elements (Single Event Upset — SEU). FPGA due to the large number of elements configuration memory is not vulnerable to the effects of radiation. Therefore, one-time programmable devices are used, for example, the companies Actel, but flip-flops tripled too. Nevertheless, in the SRAM configurable FPGA Virtex (Xilinx) used triple redundancy with Majority Vote Circuit based on a tristate buffer instead LUT. Such Voter has implementation features that are explored in the article. One of the variants of majority voter for the pins of the FPGA using a minority voting function. Only in this case, no conflict of signals at the outputs of buffers. Describes CMOS implementation of the voters. The paper proposes a fault tolerant CMOS implementation of the Majority Voter and Minority Voter in order to improve reliability and FPGA radiation resistance.
Tags: 3-state buffer majority vote circuit minority vote circuit triple module redundancy схема большинства голосов схема меньшинства голосов тристабильный буфер тройная избыточность
Timoshin Sergey A., Nuykin Andrey V., Roldugina Zhanna I.
Developing and Using the Hardware Random Number Generator in the Structure of Secure Systems on Chip The article describes the features of designing and using a hardware random number generator as a part of secure systems on a chip. Generator’s block diagram is presented and the designed random number generator’s working principle is described. A comparative analysis of different methods of correction of the generated random sequence is presented and a research is done into their impact on the statistical properties of a random sequence obtained with the developed generator.
Developing and Using the Hardware Random Number Generator in the Structure of Secure Systems on Chip The article describes the features of designing and using a hardware random number generator as a part of secure systems on a chip. Generator’s block diagram is presented and the designed random number generator’s working principle is described. A comparative analysis of different methods of correction of the generated random sequence is presented and a research is done into their impact on the statistical properties of a random sequence obtained with the developed generator.
Krasnikov Gennadiy Ya., Lushnikov Alexander S., Meschanov Vladimir D., Rybalko Egor S., Fomicheva Nadezhda N., Shelepin Nikolai A.
Studying the Fault Tolerance of SRAM With the Function of Correcting Single Event Upsets Caused by Heavy Ions The report presents results of a study of the fault tolerance of SRAM with the function of correcting single event upsets caused by heavy ions. It shows model and experimental dependencies of the fault tolerance of SRAM samples on the information correction frequency. The correspondence between the model and the experiment has been demonstrated.
Studying the Fault Tolerance of SRAM With the Function of Correcting Single Event Upsets Caused by Heavy Ions The report presents results of a study of the fault tolerance of SRAM with the function of correcting single event upsets caused by heavy ions. It shows model and experimental dependencies of the fault tolerance of SRAM samples on the information correction frequency. The correspondence between the model and the experiment has been demonstrated.
Tags: error detection and correction (edac) in sram heavy ion multiple bit upset (mbu) single event upset (seu) sram множественные сбои обнаружение и коррекция ошибок в созу однократные сбои созу тяжелые заряженные частицы
Rychkov Artyom I., Umurzakov Faihl A.
A Block of Digital Correction for a High Performance Analog-to-digital Converter This paper aims at examining the implementation of a digital correction block for a high performance analogue-to-digital converter with operating frequency over 100MHz. It highlights the general architecture of the digital correction block, as well as comparative characteristics of ADC with the digital correction block operating with floating and fixed point numbers.
A Block of Digital Correction for a High Performance Analog-to-digital Converter This paper aims at examining the implementation of a digital correction block for a high performance analogue-to-digital converter with operating frequency over 100MHz. It highlights the general architecture of the digital correction block, as well as comparative characteristics of ADC with the digital correction block operating with floating and fixed point numbers.
Tags: adc analogue-to-digital converter digital correction block floating point and fixed point computations high precision pipelined аналого-цифровой преобразователь ацп блок цифровой коррекции высокоточный вычисления с плавающей запятой и фиксированной запятой конвейерный
Tarasov Sergey V., Semeikin Igor V., Tsotsorin Andrey N.
Powerful GaN Transistors for Application in Perspective Equipment The results of measurement of domestic GaN transistors have been presented in the article. The comparative analysis of domestic transistors with foreign ones has been carried out. Various constructive variants of GaN transistor dice have been worked out in the process of design.
Powerful GaN Transistors for Application in Perspective Equipment The results of measurement of domestic GaN transistors have been presented in the article. The comparative analysis of domestic transistors with foreign ones has been carried out. Various constructive variants of GaN transistor dice have been worked out in the process of design.
Filimonova Irina P., Bezkorovainy Ivan V., Dryagalkin Dmitry I., Chumachenko Georgy O., Zaletov Vladimir Yu., Andrianov Andrey V.
Multimedia System-on-chip With PowerPC and NMC3 The current article presents an integrated high-performance, energy-efficient multimedia system on a SoC VLSI MIVEM developed by RCM “Module” based on central processor cores with PowerPC architecture and digital signal processor cores with NeuroMatrix architecture. VLSI MIVEM has two PowerPC CPU cores, four NMC3 DSP cores; a multimedia subsystem, including video devices to use for video outputs and video capture, audio device to use for audio outputs, video encoding/decoding device; a wide range of input/output interfaces for high-speed (PCIe 4x, USB2.0, Fiber Channel), low-speed (UART, I2C, SPI) and network (Gigabit Ethernet) interfaces with external memory of DDR3, SRAM, NAND and NOR. VLSI MIVEM is designed for use in both portable and stationary multimedia processing systems. Several classes of objects have been considered, for which it is possible to use the product: TV signal conversion units for onboard equipment and onboard high-performance small-sized computers.
Multimedia System-on-chip With PowerPC and NMC3 The current article presents an integrated high-performance, energy-efficient multimedia system on a SoC VLSI MIVEM developed by RCM “Module” based on central processor cores with PowerPC architecture and digital signal processor cores with NeuroMatrix architecture. VLSI MIVEM has two PowerPC CPU cores, four NMC3 DSP cores; a multimedia subsystem, including video devices to use for video outputs and video capture, audio device to use for audio outputs, video encoding/decoding device; a wide range of input/output interfaces for high-speed (PCIe 4x, USB2.0, Fiber Channel), low-speed (UART, I2C, SPI) and network (Gigabit Ethernet) interfaces with external memory of DDR3, SRAM, NAND and NOR. VLSI MIVEM is designed for use in both portable and stationary multimedia processing systems. Several classes of objects have been considered, for which it is possible to use the product: TV signal conversion units for onboard equipment and onboard high-performance small-sized computers.
Tags: central processing units (cpu) powerpc digital signal processing (dsp) neuromatrix multimedia soc system-on-chip (soc) мультимедийная микросхема процессорное ядро powerpc процессорное ядро цифровой обработки сигналов neuromatrix система на кристалле
Tags: snr ацп дробно-линейная характеристика корреция погрешности критерий погрешность квантования предельная погрешность уравнение измерений
Chistyakov Mikhail G.
Research and Optimization by Radiation Hardness Criterion of Memory Cells for 0.25μm SOI CMOS Technology in the Course of Irradiation by Flux of Fast Neutrons This paper presents the results of fault resistance researches performed for memory cells designed by 0.25µm SOI CMOS technology. Possible faults caused by hitting memory cell by fast neutrons are considered. The main approaches to memory cells hardening are also examined. Recommendations for memory cells hardening are provided.
Research and Optimization by Radiation Hardness Criterion of Memory Cells for 0.25μm SOI CMOS Technology in the Course of Irradiation by Flux of Fast Neutrons This paper presents the results of fault resistance researches performed for memory cells designed by 0.25µm SOI CMOS technology. Possible faults caused by hitting memory cell by fast neutrons are considered. The main approaches to memory cells hardening are also examined. Recommendations for memory cells hardening are provided.
Tags: memory cells resistance to charged particles impact soi sram кни созу стойкость к заряженным частицам ячейка памяти
Mazhulin Vadim V., Shamaev Evgeny A., Baranovsky Alexey O.
Particularities of Designing SERDES IP Cores of Physical Layer Data Transfer Interfaces This paper describes the particularities of the implementation of SERDES at two popular interfaces: PCI Express and SGMII. It describes the structure and the functioning of a parallel-to-serial data converter, serial-to-parallel data converter and clock signal recovery unit designed by “Module-W” JSC.
Particularities of Designing SERDES IP Cores of Physical Layer Data Transfer Interfaces This paper describes the particularities of the implementation of SERDES at two popular interfaces: PCI Express and SGMII. It describes the structure and the functioning of a parallel-to-serial data converter, serial-to-parallel data converter and clock signal recovery unit designed by “Module-W” JSC.
Tags: clock signal recovery parallel-to-serial data converter pci express serdes serial data transmission serial-to-parallel data converter sgmii восстановление тактового сигнала последовательная передача данных преобразователь данных из параллельного вида в последовательный преобразователь данных из последовательного вида в параллельный
Ilin Sergei A., Kochanov Sergei K., Lastochkin Oleg V., Novikov Anton A., Shipitsin Dmitry S.
Features of Library Development Based on MCML Circuitry on the CMOS 90nm Technology and Prospects of Using Libraries in the VLSI Design Flow The paper presents the features and principles of developing STD/IO libraries based on MCML circuitry based on CMOS 90nm technology. The basic components of the MCML elements circuitry have been presented. The pros and cons of the chosen logic and its comparison with the CMOS have been considered. Prospects of using libraries in the design of VLSI have been estimated.
Features of Library Development Based on MCML Circuitry on the CMOS 90nm Technology and Prospects of Using Libraries in the VLSI Design Flow The paper presents the features and principles of developing STD/IO libraries based on MCML circuitry based on CMOS 90nm technology. The basic components of the MCML elements circuitry have been presented. The pros and cons of the chosen logic and its comparison with the CMOS have been considered. Prospects of using libraries in the design of VLSI have been estimated.
Tags: cmos io libraries mos current-mode logic std libraries vlsi библиотеки буферов ввода-вывода библиотеки стандартных элементов кпоп моп логика сбис управляемая током
Ilin Sergei A., Kochanov Sergei K., Lastochkin Oleg V., Nadin Alexey S., Novikov Anton A., Shipitsin Dmitry S.
The Design Platform for Domestic 90nm SOI Technology The article describes the design-technological platform for 90nm SOI technology, its composition, including a set of digital element libraries and I/O interface libraries, describes a test crystal (TC) manufactured within the framework of research work, analyzes the results of testing the TC and element base.
The Design Platform for Domestic 90nm SOI Technology The article describes the design-technological platform for 90nm SOI technology, its composition, including a set of digital element libraries and I/O interface libraries, describes a test crystal (TC) manufactured within the framework of research work, analyzes the results of testing the TC and element base.
Tags: ddk interface i/o library i/o libraries of standard cells pdk process design kit soi std библиотеки интерфейсных элементов ввода-вывода библиотеки цифровых элементов кни комплект средств проектирования конструкторско-технологическая платформа
Methods and algorithms of VLSI CAD
Butuzov Vladimir A., Bocharov Yuri I., Shunkov Valery E., Kus Oleg N., Prokopyev Vitaly Y.
Optimizing Capacitor Array Layout in SAR ADC The influence of the capacitor array layout on the accuracy of successive approximation ADC is discussed. Recommendations allowing to optimize the values of unit capacitors of the capacitive array and to estimate the size of the ADC in the early stages of design are given.
Optimizing Capacitor Array Layout in SAR ADC The influence of the capacitor array layout on the accuracy of successive approximation ADC is discussed. Recommendations allowing to optimize the values of unit capacitors of the capacitive array and to estimate the size of the ADC in the early stages of design are given.
Tags: adc adc resolution analog-to-digital converter layout nonlinearity sar adc switched capacitor array аналого-цифровой преобразователь ацп ацп последовательного приближения матрица переключаемых конденсаторов нелинейность разрешающая способность ацп топология
Glushko Andrey A., Yashin Georgy A., Novoselov Anton S., Amirkhanov Alexey V., Zinchenko Lyudmila A., Makarchuk Vladimir V., Sergeeva Natalia A.
Application of Visual Analytics and TCAD Systems in Quality Management of VLSI Crystal Formation Technological Processes A technique for using visual analytics to control the quality of VLSI crystal forming processes is proposed. The application of the suggested quality management technique for example of the detection of an implant failure and the example of designing a test structure for controlling the resistance of LDD areas is considered.
Application of Visual Analytics and TCAD Systems in Quality Management of VLSI Crystal Formation Technological Processes A technique for using visual analytics to control the quality of VLSI crystal forming processes is proposed. The application of the suggested quality management technique for example of the detection of an implant failure and the example of designing a test structure for controlling the resistance of LDD areas is considered.
Tags: quality management tcad simulation visual analytics vlsi визуальная аналитика приборно-технологическое моделирование сбис управление качеством
Gourary Mark M., Zharov Mikhail M., Ionov Leonid P., Mukhin Igor I., Rusakov Serghey G., Ulyanov Serghey L.
PLL Simulation Using Phase Macromodels in the Form of Equivalent Electrical Circuit The paper considers an approach to analyzing fractional-N frequency synthesizer using the PLL phase macromodel in the form of equivalent electrical circuit. A method of averaging spectrum of quantization noise has been proposed. The averaged spectrum is independent of the number of simulation steps. Simulation results of PLL circuits have been presented.
PLL Simulation Using Phase Macromodels in the Form of Equivalent Electrical Circuit The paper considers an approach to analyzing fractional-N frequency synthesizer using the PLL phase macromodel in the form of equivalent electrical circuit. A method of averaging spectrum of quantization noise has been proposed. The averaged spectrum is independent of the number of simulation steps. Simulation results of PLL circuits have been presented.
Tags: analog circuits equivalent circuit frequency synthesizer noise analysis phase locked loop phase noise sigma-delta modulator аналоговые схемы сигма-дельта модулятор синтезатор частот фазовая автоподстройка частоты фазовый шум шумовой анализ эквивалентная схема
Aristov Roman S., Vlasov Andrey I., Viryasova Anastasia Yu., Gladkikh Alexei A., Makarchuk Vladimir V.
Investigating Diff erent Convolution Neural Network Models Used for Imaging Defects Classifi cation of VLSI Patterns Various modern models of neural networks have been considered, their training has been carried out, and the results of experimental studies of the use of each model for the classification of defects in the VLSI topology have been presented. The method of using neural networks for detecting objects in an image has been described, and the result of applying this method to defects in the VLSI topology has been given.
Investigating Diff erent Convolution Neural Network Models Used for Imaging Defects Classifi cation of VLSI Patterns Various modern models of neural networks have been considered, their training has been carried out, and the results of experimental studies of the use of each model for the classification of defects in the VLSI topology have been presented. The method of using neural networks for detecting objects in an image has been described, and the result of applying this method to defects in the VLSI topology has been given.
Tags: alexnet caffenet class activation cards cnn convolutional neural networks defects googlenet keras optimization vggnet vlsi дефекты карты активации класса оптимизация сбис сверточные нейронные сети
Petrosyants Konstantin O.
Compact SPICE Models of CMOS and BiCMOS VLSI Devices With Account for Thermal and Radiation Eff ects The paper presents a library of radiation and electrothermal BJT and MOSFET VLSI SPICE models. The library contains models for MOSFET, SOI/SOS MOSFET, Si BJT, SeGe HBT taking into account self-heating, high (up to +300 °C) and low (up to −200 °C) temperatures, the influence of radiation (neutrons, electrons, γ- and X-ray, protons, pulsed radiation, single particles).
Compact SPICE Models of CMOS and BiCMOS VLSI Devices With Account for Thermal and Radiation Eff ects The paper presents a library of radiation and electrothermal BJT and MOSFET VLSI SPICE models. The library contains models for MOSFET, SOI/SOS MOSFET, Si BJT, SeGe HBT taking into account self-heating, high (up to +300 °C) and low (up to −200 °C) temperatures, the influence of radiation (neutrons, electrons, γ- and X-ray, protons, pulsed radiation, single particles).
Tags: bicmos vlsi bjt. spice models cmos vlsi mosfet radiation space electronics spice-модели temperature биполярные и моп-транзисторы кмоп и бикмоп интегральные схемы космическая электроника радиация температура
Petrosyants Konstantin O., Kozhukhov Maxim V., Popov Dmitriy A.
General TCAD Model of MOSFET and BJT Structures With Account for Radiation Eff ects The paper considers a new TCAD Rad model for BJTs and MOSFETs for proton radiation. The equations for radiation-dependent parameters (life time, mobility, surface velocity, traps concentration) have been added in Sentaurus TCAD. The simulation results are in good agreement with experimental data.
General TCAD Model of MOSFET and BJT Structures With Account for Radiation Eff ects The paper considers a new TCAD Rad model for BJTs and MOSFETs for proton radiation. The equations for radiation-dependent parameters (life time, mobility, surface velocity, traps concentration) have been added in Sentaurus TCAD. The simulation results are in good agreement with experimental data.
Tags: bjt mosfet physical models proton radiation effects tcad биполярные протоны радиационные эффекты физические модели
Kononov Alexey A., Pugachev Andrey A., Sokolov Serghey V.
Designing Photosensitive VLSI With Resolution Analysis The paper presents algorithms for photosensitive VLSI design with resolution analysis. The algorithms are based on the new methods of technological-device modeling of photosensitive VLSIʼs resolution with Sentaurus TCAD (Synopsys). The algorithms have been applied in numerous CCD and CMOC image sensors practical design.
Designing Photosensitive VLSI With Resolution Analysis The paper presents algorithms for photosensitive VLSI design with resolution analysis. The algorithms are based on the new methods of technological-device modeling of photosensitive VLSIʼs resolution with Sentaurus TCAD (Synopsys). The algorithms have been applied in numerous CCD and CMOC image sensors practical design.
Tags: algorithm of design photosensitive vlsi resolution tcad tcad technological-device modeling алгоритм проектирования приборно-технологическое моделирование разрешающая способность фоточувствительная сбис
Gourary Mark M., Zharov Michael M., Rusakov Sergey G., Ulyanov Sergey L.
Envelope Following Method for Determining Transient Response and Steady State of Electronic Circuits The paper considers the problems of envelope following method construction for determining transient response and steady state of integrated circuits. The envelope following algorithms based on using one-step high order integration methods have been offered.
Envelope Following Method for Determining Transient Response and Steady State of Electronic Circuits The paper considers the problems of envelope following method construction for determining transient response and steady state of integrated circuits. The envelope following algorithms based on using one-step high order integration methods have been offered.
Tags: circuit simulation envelope following methods ordinary differential equations periodic steady state transient response автоматизация схемотехнического проектирования методы огибающих обыкновенные дифференциальные уравнения переходной процесс периодический установившийся режим численные методы решения
Lebedev Sergey V., Petrosyants Konstantin O., Stakhin Veniamin G., Kharitonov Igor A.
Special Aspects of Submicrometer MOSFETs Simulation for Low Voltage, Ultra-low Power CMOS IC Design The paper summarizes requirements to SPICE models, simulation tools, aspects of model parameter extraction for design of low voltage, ultra-low power CMOS ICs. It presents the results of 2NAND circuit (L = 0.35mkm) simulation for supply voltage reduced from 0.7V to 0.3V. Their logical performance capabilities have been shown for the lowest value of supply voltage, with greatly reduced working frequency.
Special Aspects of Submicrometer MOSFETs Simulation for Low Voltage, Ultra-low Power CMOS IC Design The paper summarizes requirements to SPICE models, simulation tools, aspects of model parameter extraction for design of low voltage, ultra-low power CMOS ICs. It presents the results of 2NAND circuit (L = 0.35mkm) simulation for supply voltage reduced from 0.7V to 0.3V. Their logical performance capabilities have been shown for the lowest value of supply voltage, with greatly reduced working frequency.
Tags: bsim bsimsoi cad tools cmos fets ekv ics low voltage circuits model parameter extraction spice models spice модели subthreshold mode ultra-low power кмоп транзисторы микромощные схемы низковольтные схемы параметры моделей предпороговый режим работы сапр
Khokhlov Mikhail V.
Investigating High-density Electronic 3D Modules Thermal Characteristics for Information-control Systems Three-dimensional integration of LSI crystals aggravates the problem of accounting for heat distribution in devices such as “System in a casing”. In this paper, we consider the application of the thermal resistance method for the experimental determination of thermal parameters of multilevel structures of 3D MCM and the evaluation of the overheating of LSI crystals when they are mounted in a stacked structure.
Investigating High-density Electronic 3D Modules Thermal Characteristics for Information-control Systems Three-dimensional integration of LSI crystals aggravates the problem of accounting for heat distribution in devices such as “System in a casing”. In this paper, we consider the application of the thermal resistance method for the experimental determination of thermal parameters of multilevel structures of 3D MCM and the evaluation of the overheating of LSI crystals when they are mounted in a stacked structure.
Tags: multi-chip module “system in package” thermal resistance многокристальный модуль система в корпусе тепловое сопротивление
Fateyev Ivan A., Shalashova Elena S.
Developing a Trigger Set With Enhanced Mitigation to Heavy Charged Particles Impact on the Base of SOI CMOS Technology Modern microcircuits due to technological features size scaling, decrease of voltage supply and internal capacities, are becoming ever more sensitive to heavy particles impact. Conventional process-dedicated cells, resistant to heavy particles impact, lose their advantages because of heavy particles impact on a number of sensitive areas. This paper presents a radiation-hardened set of D-triggers with and without reset and set-up signals developed on the base of DICE element using 200nm SOI technology.
Developing a Trigger Set With Enhanced Mitigation to Heavy Charged Particles Impact on the Base of SOI CMOS Technology Modern microcircuits due to technological features size scaling, decrease of voltage supply and internal capacities, are becoming ever more sensitive to heavy particles impact. Conventional process-dedicated cells, resistant to heavy particles impact, lose their advantages because of heavy particles impact on a number of sensitive areas. This paper presents a radiation-hardened set of D-triggers with and without reset and set-up signals developed on the base of DICE element using 200nm SOI technology.
Tags: dice fault tolerance heavy charged particle radiation resistance see seu single faults soi кни одиночные сбои радиационная стойкость сбоеустойчивость тзч
Fateyev Ivan A., Shalashova Elena S
The Infl uence of Clock Gating Cells on Navigation Receiver Path Immunity to Single Nuclear Particles Impact In this article described the effect of clock gating cell on heavy ion hit vulnerability. The schemes with and without clock gating cells are compared. Shown the influence of clock gating cell presence on the susceptible areas.
The Infl uence of Clock Gating Cells on Navigation Receiver Path Immunity to Single Nuclear Particles Impact In this article described the effect of clock gating cell on heavy ion hit vulnerability. The schemes with and without clock gating cells are compared. Shown the influence of clock gating cell presence on the susceptible areas.
Yashin George A., Glushko Andrey A., Chistyakov Mikhail G., Makarchuk Vladimir V., Novoselov Anton S., Amirkhanov Alexey V., Zinchenko Lyudmila A.
Developing and Investigating 0.35-micron SPICE-model of SOI MOS-transistor With F-type Gate Geometry Using TCAD Instrument-process Modelling System The paper presents a SPICE-model of MOS-transistor with F-type gate geometry manufactured using SoI technology with minimal element size equal to 0.35 micron and TCAD instrument-process modelling system. Basing on the data obtained in the course of instrument-process modelling, physical effects revealed during its operation were explained, and concept of SPICE-model was developed.
Developing and Investigating 0.35-micron SPICE-model of SOI MOS-transistor With F-type Gate Geometry Using TCAD Instrument-process Modelling System The paper presents a SPICE-model of MOS-transistor with F-type gate geometry manufactured using SoI technology with minimal element size equal to 0.35 micron and TCAD instrument-process modelling system. Basing on the data obtained in the course of instrument-process modelling, physical effects revealed during its operation were explained, and concept of SPICE-model was developed.
Tags: f-type f-тип instrument-process modelling mos-transistor spice моп-транзистор приборно-технологическое моделирование
Microwave integrated circuits and modules
Kokolov Andrei A., Dobush Igor M., Sheyerman Fyodor I., Babak Leonid I., Zhabin Dmitry A., Svetlichniy Yury A.
IP-blocks of Broadband RF Amplifi ers for Single-chip L- and S-band Receivers Based on SiGe Process The paper presents the design and measurements of broadband amplifier IP-blocks based on 0.25μm SiGe BiCMOS process. The frequency band and output power are respectively 1–5GHz and 13.2dBm for a single-ended amplifier, and 1.5–5GHz and 17dBm for differential amplifier. IP-blocks will be used in RF front-ends of receivers intended for different frequency bands and applications.
IP-blocks of Broadband RF Amplifi ers for Single-chip L- and S-band Receivers Based on SiGe Process The paper presents the design and measurements of broadband amplifier IP-blocks based on 0.25μm SiGe BiCMOS process. The frequency band and output power are respectively 1–5GHz and 13.2dBm for a single-ended amplifier, and 1.5–5GHz and 17dBm for differential amplifier. IP-blocks will be used in RF front-ends of receivers intended for different frequency bands and applications.
Tags: broadband amplifier ip-block mmic receiver rf front-end sige bicmos process sige бикмоп-технология монолитная интегральная схема приемник радиочастотный тракт сложно-функциональный блок широкополосныый усилитель
Kokolov Andrei A., Babak Leonid I., Zhabin Dmitry A., Sheyerman Fyodor I.
Automated Synthesis of Microwave Diff erential Amplifi ers Based on Genetic Algorithm The paper presents a genetic-algorithm-based technique for automated synthesis of microwave differential amplifier schematics with resistive or complex terminations. As an example, the synthesis of 1.5–5GHz 0.25μm SiGe BiCMOS MMIC amplifier used as LO amplifier for passive double-balanced mixer has been presented.
Automated Synthesis of Microwave Diff erential Amplifi ers Based on Genetic Algorithm The paper presents a genetic-algorithm-based technique for automated synthesis of microwave differential amplifier schematics with resistive or complex terminations. As an example, the synthesis of 1.5–5GHz 0.25μm SiGe BiCMOS MMIC amplifier used as LO amplifier for passive double-balanced mixer has been presented.
Tags: automated synthesis genetic algorithm lo аmplifier microwave differential аmplifier mmic sige bicmos sige бикмоп автоматический синтез генетический алгоритм мис свч дифференциальный усилитель
Volosov Anatoly V., Bavizhev Mikhail D., Kotlyarov Evgeny Yu., Panasenko Petr V.
X-Band Transmit-receive Module on Silicon Commutation Board The work is devoted to the development of the design, the silicon commutation board (SCB) manufacturing technology and the experimental studies of the X-band transmit-receive module (TRM) realized on board basis. It is shown that along with the “classical” TSV technology for the manufacture of SCB, original design and technological solutions available to Russian silicon plants can be used. One of the constructive and technological options implemented in “Mikron” PJSC and “NPP “Radiy” JSC has been considered. The results of experimental studies of the X-Band TRM on a silicon commutation board have been presented. It has been shown that the considered constructive-technological solution allows achieving a multiple improvement of the TRM mass-dimension parameters while electrical parameters are not changing with respect to its implementation based on low-temperature ceramics or on multi-layer polymer printed circuit boards.
X-Band Transmit-receive Module on Silicon Commutation Board The work is devoted to the development of the design, the silicon commutation board (SCB) manufacturing technology and the experimental studies of the X-band transmit-receive module (TRM) realized on board basis. It is shown that along with the “classical” TSV technology for the manufacture of SCB, original design and technological solutions available to Russian silicon plants can be used. One of the constructive and technological options implemented in “Mikron” PJSC and “NPP “Radiy” JSC has been considered. The results of experimental studies of the X-Band TRM on a silicon commutation board have been presented. It has been shown that the considered constructive-technological solution allows achieving a multiple improvement of the TRM mass-dimension parameters while electrical parameters are not changing with respect to its implementation based on low-temperature ceramics or on multi-layer polymer printed circuit boards.
Tags: silicon commutation board thin-film capacitors transmit-receive module tsv technology tsv-технология x-band кремниевая коммутационная плата приемопередающий модуль тонкопленочные конденсаторы х-диапазон
Volosov Anatoly V., Panasenko Petr V., Pyatochkin Mikhail D.
Modeling Thermal Processes in Microwave Modules With Various Bases The work is devoted to modeling thermal processes in microwave receiving-transmitting modules. The results of modeling the influence of the circuit board material and the through-metallized holes configuration on circuit board thermal conductivity have been presented. The temperature fields distribution established during the regular device operation has been shown. The modules execution has been investigated in the following cases: on a multilayered board made of low-temperature ceramics, on multilayered polymeric printed circuit board and on the basis of silicon commutation boards. The results have been analyzed and compared with experimental data.
Modeling Thermal Processes in Microwave Modules With Various Bases The work is devoted to modeling thermal processes in microwave receiving-transmitting modules. The results of modeling the influence of the circuit board material and the through-metallized holes configuration on circuit board thermal conductivity have been presented. The temperature fields distribution established during the regular device operation has been shown. The modules execution has been investigated in the following cases: on a multilayered board made of low-temperature ceramics, on multilayered polymeric printed circuit board and on the basis of silicon commutation boards. The results have been analyzed and compared with experimental data.
Tags: active phased array interposer low-temperature co-fired ceramics microwave receiving-transmitting module silicon thermal processes активная фазированная антенная решетка интерпозер кремний низкотемпературная керамика приемо-передающий модуль свч тепловые процессы
Ivanova Natalia E., Shchavruk Nikolay V., Trofi mov Alexander A., Kondratenko Vladimir S.
Features of Sapphire Wafers Splitting on MMIC Crystals The article is devoted to studies on the separation of MMIC crystals based on AlGaN/GaN heterostructures on sapphire substrates with developed relief and possessing complex structural features. A brief description protection method of such MMIC, modes of thinning and splitting on crystals using the method of laser-controlled thermocracking has been given. Electrophysical studies of MMIS have been carried out on plate and after plate separation into crystals.
Features of Sapphire Wafers Splitting on MMIC Crystals The article is devoted to studies on the separation of MMIC crystals based on AlGaN/GaN heterostructures on sapphire substrates with developed relief and possessing complex structural features. A brief description protection method of such MMIC, modes of thinning and splitting on crystals using the method of laser-controlled thermocracking has been given. Electrophysical studies of MMIS have been carried out on plate and after plate separation into crystals.
Tags: algan/gan cutting sapphire electrophysical parameters laser-controlled thermocracking mmis mmis protection photolacquer plate separation polymer dielectric uhf mis защита свч мис лазерное управляемое термораскалывание (лут) полимерный диэлектрик разделение пластин резка сапфира свч мис фотолак электрофизические параметры
Leontiev Evgeniy V., Korotkov Alexander S., Balashov Evgeniy V.
Large Signal Stability Analysis Technique of GaN HEMT for Synthesis of MMIC PA in CAD Microwave Offi ce The article shows the technique for analyzing the stability of HEMT in the large signal mode in the synthesis of MMIC PA in CAD Microwave Office. A technique for determining stability in the large signal mode through the LSS parameters of the nonlinear HEMT model has been described. The synthesis of the stability circuit of
Large Signal Stability Analysis Technique of GaN HEMT for Synthesis of MMIC PA in CAD Microwave Offi ce The article shows the technique for analyzing the stability of HEMT in the large signal mode in the synthesis of MMIC PA in CAD Microwave Office. A technique for determining stability in the large signal mode through the LSS parameters of the nonlinear HEMT model has been described. The synthesis of the stability circuit of
Martirosov Vladimir E., Alekseev Georgiy A.
Microwave Frequency Synthesizer Executed in Microelectronic Circuits The paper describes problems of developing of a microwave frequency synthesizer in microelectronic design. The efficiency of the synthesizer structure of indirect synthesis method optimized for the complex quality criterion — maximization of the synchronization frequency range, minimization of the discrete frequency tuning time and minimization of the phase noise of the generated microwave oscillation — has been shown.
Microwave Frequency Synthesizer Executed in Microelectronic Circuits The paper describes problems of developing of a microwave frequency synthesizer in microelectronic design. The efficiency of the synthesizer structure of indirect synthesis method optimized for the complex quality criterion — maximization of the synchronization frequency range, minimization of the discrete frequency tuning time and minimization of the phase noise of the generated microwave oscillation — has been shown.
Tags: effective suppression of phase noise high dynamic characteristics microelectronic design microwave frequency synthesizer synchronization system phase portrait высокие динамические характеристики метод косвенного синтеза микроэлектронное исполнение свч синтезатор частот фазовый портрет системы синхронизации эффективное подавление фазовых шумов
Abolduev Igor M., Krasnov Vyacheslav V., Minnebaev Stanislav V., Filatov Anatoly L.
Designing GaN HEMT for Receiving Devices In the past few years a great number of electronic components research and design laboratories for ground and space wireless communications have been focused on the research and applicaion of AlGaN/GaN heterostructure-based devices. In this work we tried to present our results in comparison of GaN HEMT and GaAs pHEMT technologies from the point of their application in LNAs. Also we demonstrated the method of GaN HEMT small signal model extraction. Two types of HEMT topologies were used to design and produce LNAs. The results of NF and Gain measurements at room and cryogenic temperatures of these LNAs are also demonstrated in this article.
Designing GaN HEMT for Receiving Devices In the past few years a great number of electronic components research and design laboratories for ground and space wireless communications have been focused on the research and applicaion of AlGaN/GaN heterostructure-based devices. In this work we tried to present our results in comparison of GaN HEMT and GaAs pHEMT technologies from the point of their application in LNAs. Also we demonstrated the method of GaN HEMT small signal model extraction. Two types of HEMT topologies were used to design and produce LNAs. The results of NF and Gain measurements at room and cryogenic temperatures of these LNAs are also demonstrated in this article.
Tags: cryogenic measurements gallium arsenide gallium nitride hemt low-noise amplifier noise factor small-signal model
Mukhin Igor I., Bychkov Mikhail S., Ionov Leonid P., Shabardin Ruslan S.
Features of Developing Silicon-Germanium Frequency Converters, Including an Integrated PLL Synthesizer The paper presents the results of the development of mixer ICs: active balanced mixer L-band, C-band mixer, mixer with built-in fractional synthesizer with internal VCO. The developed integrated circuits have one of the best combination of parameters
Features of Developing Silicon-Germanium Frequency Converters, Including an Integrated PLL Synthesizer The paper presents the results of the development of mixer ICs: active balanced mixer L-band, C-band mixer, mixer with built-in fractional synthesizer with internal VCO. The developed integrated circuits have one of the best combination of parameters
Tags: active mixer fractional frequency synthesizer frequency converter gilbert mixer sige technology vco активный смеситель дробный синтезатор частот кремний-германиевая технология микросхема преобразователь частоты свч смеситель джильберта
Ospennikov Arkadi M., Ermak Sergey V., Petrenko Mikhail V.
Future-technology Application of Microelectronic Integrated Design Approaches in Miniature Quantum Frequency Standard of “RIRT” JSC This report presents the main results of the work carried out by “Russian Institute of Radionavigation and Time” JSC to create a miniature quantum frequency standard using the effect of coherent population trapping. Samples of vertical cavity surface emitting lasers and integral cells created using MEMS technologies have been developed whose characteristics correspond to an estimate of the relative short-term instability of the order of 10−11. The parameters of the physical and electronic blocks of the created model of the miniature quantum frequency standard have made it possible to develop the basic technical requirements for the frequency standard elements and to determine the prospect of using integrated microelectronic units of domestic production in the device.
Future-technology Application of Microelectronic Integrated Design Approaches in Miniature Quantum Frequency Standard of “RIRT” JSC This report presents the main results of the work carried out by “Russian Institute of Radionavigation and Time” JSC to create a miniature quantum frequency standard using the effect of coherent population trapping. Samples of vertical cavity surface emitting lasers and integral cells created using MEMS technologies have been developed whose characteristics correspond to an estimate of the relative short-term instability of the order of 10−11. The parameters of the physical and electronic blocks of the created model of the miniature quantum frequency standard have made it possible to develop the basic technical requirements for the frequency standard elements and to determine the prospect of using integrated microelectronic units of domestic production in the device.
Tags: coherent population trapping frequency synthesizers microelectronic uhf generators quantum frequency standard квантовый стандарт частоты когерентное пленение населенностей микроэлектронные генераторы свч синтезаторы частоты
Vilkov Evgeny A., Maksimov Nikolay A., Mikhailov Gennady M., Panas Andrey I., Chernykh Anatoly V., Chigarev Sergey G.
Nonlinear Dynamic of Terahertz Waves Spin-injection Radiation in Nanoscale Magnetic Junctions The paper analyzes experimental data of THz waves’ spin-injection stimulated (induced) radiation in nanoscale magnetic junctions. Besides, it considers nonlinear effects of the radiation with regard to similarities to turbulent processes in the hydrodynamics and dynamic chaos in radiophysics.
Nonlinear Dynamic of Terahertz Waves Spin-injection Radiation in Nanoscale Magnetic Junctions The paper analyzes experimental data of THz waves’ spin-injection stimulated (induced) radiation in nanoscale magnetic junctions. Besides, it considers nonlinear effects of the radiation with regard to similarities to turbulent processes in the hydrodynamics and dynamic chaos in radiophysics.
Tags: magnetic junctions nonlinear interaction spin-injection radiation terahertz (thz) waves turbulence магнитные переходы нелинейное взаимодействие спин-инжекционное излучение терагерцовые (тгц) волны турбулентность
Pevtsov Evgeny F., Bespalov Alexey V., Bush Alexander A., Golikova Olga L.
Electrophysical Properties of Structures Based on Ferroelectric Thin Films We have taken an extensive investigation of electrophysical properties of ferroelectric structures based on Pt/PbZr0.53Ti0.47O3/Pt/Ti/SiO2/Si and PbTiO3/YBa2Cu3O7–x/SrTiO3. The current-voltage characteristics of these structures new data were obtained. Physical models estimate the parameters describing the processes of polarization switching and effects at the boundaries between layers were performed.
Electrophysical Properties of Structures Based on Ferroelectric Thin Films We have taken an extensive investigation of electrophysical properties of ferroelectric structures based on Pt/PbZr0.53Ti0.47O3/Pt/Ti/SiO2/Si and PbTiO3/YBa2Cu3O7–x/SrTiO3. The current-voltage characteristics of these structures new data were obtained. Physical models estimate the parameters describing the processes of polarization switching and effects at the boundaries between layers were performed.
Tags: capacitance-voltage characteristics ferroelectric thin films heterostructure high temperature superconductors interfaces вольт-фарадные характеристики высокотемпературные сверхпроводники гетероструктуры границы раздела сегнетоэлектрические тонкие пленки
Timoshenkov Valeri P., Khlybov Alexander I., Rodionov Denis V.
Extracting HEMT Model Parameters Using TDR Approach The paper presents advantages of the time domain approach as compared to frequency domain approach. The authors have applied of reflectometry method to solve the problem of HEMT SPICE parameters extraction. HEMT parameters have been measured in dynamic mode (input capacitance, transition capacitance, channel resistance in linear and saturation regions, transconductance).
Extracting HEMT Model Parameters Using TDR Approach The paper presents advantages of the time domain approach as compared to frequency domain approach. The authors have applied of reflectometry method to solve the problem of HEMT SPICE parameters extraction. HEMT parameters have been measured in dynamic mode (input capacitance, transition capacitance, channel resistance in linear and saturation regions, transconductance).
Sotskov Denis I., Elesin Vadim V., Kuznetsov Alexander G., Nazarova Galina N., Chukov Georgy V., Usachev Nikolay A., Telets Vitaly A.
Design Issues of Radiation Tolerant RF Frequency Synthesizer ICs The paper presents an overview of radiation effects in RF frequency synthesizers (FS) IP-blocks. Design issues of radiation tolerant FSs operating up to 4GHz for 180nm SOI CMOS process have been presented.
Design Issues of Radiation Tolerant RF Frequency Synthesizer ICs The paper presents an overview of radiation effects in RF frequency synthesizers (FS) IP-blocks. Design issues of radiation tolerant FSs operating up to 4GHz for 180nm SOI CMOS process have been presented.
Tags: frequency synthesizer phase-locked loop radiation hardness radio frequency радиационная стойкость свч синтезатор частот фапч
Timoshenkov Valeri P. Efi mov Andrey G.
Designing Core Chip SiGe for Phased Array T/R Modules The structure of the Core Chip for Phased Array T/R Modules has been presented. Methods for the formation of a phase delay for X phase shifters have been considered. An original differential design of SiGe core chip for X-band has been presented. The schematic of 5 bits phase shifter and attenuator have been designed. It consists of a series number LPF and HPF filters. Gain of phase shifter is 1.5dB. Attenuator has the adjustment range from 0 to 24dB. Linear output power of the core chip is 5dBm. The total consumed current of the device is 158mA at 5V power supply.
Designing Core Chip SiGe for Phased Array T/R Modules The structure of the Core Chip for Phased Array T/R Modules has been presented. Methods for the formation of a phase delay for X phase shifters have been considered. An original differential design of SiGe core chip for X-band has been presented. The schematic of 5 bits phase shifter and attenuator have been designed. It consists of a series number LPF and HPF filters. Gain of phase shifter is 1.5dB. Attenuator has the adjustment range from 0 to 24dB. Linear output power of the core chip is 5dBm. The total consumed current of the device is 158mA at 5V power supply.
Tags: core chip heterojunction bipolar transistor phased array sige t/r module гетеропереходный биполярный транзистор приемно-передающий модуль устройство управления фазой
Filippov Ivan F., Pomorev Andrey S., Kharitonov Semyon A., Duchenko Nikolay V., Vetrov Igor L., Vertegel Valery V., Gimpilevich Yuri B.
Design and Research of L- and S-band SiGe Integrated Quadrature Signal Generators Modern L-, S-, C-band transceivers are built based on quadrature signal processing, implemented on the basis of quadrature signal generator (QSG) integrated circuits. The paper provides an overview of the types, calculation methods and characteristics of integrated QSG that are widely used in the construction of complex-functional blocks of the transceiver devices. The opportunity to improve the performance of the QSG, developed on the basis of SiGe BiCMOS technology, is shown. The results of design and simulation characteristics of schematic diagrams, layout QSG based on LC-, RC-networks, triggers for frequency range 1–4GHz is shown.
Design and Research of L- and S-band SiGe Integrated Quadrature Signal Generators Modern L-, S-, C-band transceivers are built based on quadrature signal processing, implemented on the basis of quadrature signal generator (QSG) integrated circuits. The paper provides an overview of the types, calculation methods and characteristics of integrated QSG that are widely used in the construction of complex-functional blocks of the transceiver devices. The opportunity to improve the performance of the QSG, developed on the basis of SiGe BiCMOS technology, is shown. The results of design and simulation characteristics of schematic diagrams, layout QSG based on LC-, RC-networks, triggers for frequency range 1–4GHz is shown.
Tags: bicmos polyphase filter quadrature signal generator sige бикмоп полифазный фильтр формирователь квадратурных сигналов
Chukov Georgy V., Elesin Vadim V., Nazarova Galina N., Usachev Nikolay A., Boychenko Dmitriy V., Nikiforov Alexander Yu., Telets Vitaly A.
Infl uence of the Choice of Controlled Validity Criteria Parameters on the Result of Estimation of Radiation Hardness Level for Modern Solidstate Microwave Electronics The paper analyzes the influence of the choice of validity criteria parameters and norms on their deviation from radiation hardness levels of microwave range electronic components.
Infl uence of the Choice of Controlled Validity Criteria Parameters on the Result of Estimation of Radiation Hardness Level for Modern Solidstate Microwave Electronics The paper analyzes the influence of the choice of validity criteria parameters and norms on their deviation from radiation hardness levels of microwave range electronic components.
Tags: integrated circuit microwave parameters criteria radiation hardness интегральная схема параметры-критерии радиационная стойкость сверхвысокая частота
Abolduev Igor M., Valamin Evgeniy A., Dorofeyev Alexei A., Zubkov A.M., Minnebaev Stanislav V., Tsarev Alexander V., Kuliev M.V.
GaN HEMT-based Voltage Controlled Oscillators Solid-state microwave oscillators are part of many microwave systems. In this paper we propose design solutions for three types of voltage controlled oscillators for different tuning ranges and consider the effect of HEMT design on the phase noise level.
GaN HEMT-based Voltage Controlled Oscillators Solid-state microwave oscillators are part of many microwave systems. In this paper we propose design solutions for three types of voltage controlled oscillators for different tuning ranges and consider the effect of HEMT design on the phase noise level.
Abolduev Igor M., Borisov Oleg V., Gerasimov Andrey O., Kolkovskiy Yury V., Minnebaev Vadim M., Osipovskiy Alexei A., Redka Alexei V., Redka Andrey V., Tikhomirov Alexander V.
Antenna Modules for X-band AESA In this paper the results of development and manufacturing of antenna modules designed for the active electronically scanned antenna array of space radar system for Earth remote sensing are presented. Products comprise transceiver modules based on microwave GaN HEMTs, secondary power supplies, microstrip antenna arrays.
Antenna Modules for X-band AESA In this paper the results of development and manufacturing of antenna modules designed for the active electronically scanned antenna array of space radar system for Earth remote sensing are presented. Products comprise transceiver modules based on microwave GaN HEMTs, secondary power supplies, microstrip antenna arrays.
Microsystems
Baranov Alexander A., Zhukova Svetlana A., Obizhaev Denis Yu., Turkov Vladimir E.
Fabricating a High Aspect Ratio Ferromagnetic Core 3D Micro-inductor Using MEMS Technology The present report deals with the main aspects of the 3D high aspect ratio ferromagnetic core micro-inductor fabrication using MEMS technology and the investigation of the fabricated inductor main characteristics.
Fabricating a High Aspect Ratio Ferromagnetic Core 3D Micro-inductor Using MEMS Technology The present report deals with the main aspects of the 3D high aspect ratio ferromagnetic core micro-inductor fabrication using MEMS technology and the investigation of the fabricated inductor main characteristics.
Tags: 3d micro-inductor ferromagnetic core high aspect ratio su-8 высокое аспектное соотношение мэмс тонкопленочная катушка ферромагнитный сердечник
Baranov Alexander A., Zhukova Svetlana A., Obizhaev Denis Yu., Turkov Vladimir E., Vorobiev Alexei D., Lagun Alexander M., Mashevich Pavel R., Trudnovskaya Evgenia A.
Miniature Two-axis Single-chip Micromechanical Accelerometer With Measurement Range of ±10m/s2 This report deals with design and technology features of two-axis micromechanical accelerometer. Main accelerometer specifications and the ability of sensor element encapsulation by silicon cap have also been represented.
Miniature Two-axis Single-chip Micromechanical Accelerometer With Measurement Range of ±10m/s2 This report deals with design and technology features of two-axis micromechanical accelerometer. Main accelerometer specifications and the ability of sensor element encapsulation by silicon cap have also been represented.
Tags: mems sensor element single-chip micromechanical accelerometer surface micromachining unpackaged accelerometer бескорпусной акселерометр мэмс однокристальный микромеханический акселерометр поверхностная микрообработка чувствительный элемент
Antsev Ivan G., Bogoslovsky Sergei V., Sapozhnikov Gennady A., Zhgoon Sergei A., Shvetsov Alexander S.
Surface Acoustic Temperature Sensor Based on Mirror Topology Designed for Intelligent Control Systems A new design, which implements the mirror topology of the sensitive element of temperature sensors, has been proposed. The use of delay lines allows creating passive devices operating at long ranges. The proposed solution extends the field of application of mirror topologies for temperature measurements.
Surface Acoustic Temperature Sensor Based on Mirror Topology Designed for Intelligent Control Systems A new design, which implements the mirror topology of the sensitive element of temperature sensors, has been proposed. The use of delay lines allows creating passive devices operating at long ranges. The proposed solution extends the field of application of mirror topologies for temperature measurements.
Tags: delay line surface acoustic waves temperature sensor датчик температуры линия задержки поверхностные акустические волны
Vertyanov Denis V., Burakov Mikhail M., Kruchinin Sergei M., Sidorenko Vitaly N., Brykin Arseniy V.
3D Microassembly Based on Silicon Interconnection Boards and Unpackaged MEMS Elements The paper presents the concept of 3D microassembly technology based on silicon interconnection boards, highlighting the main advantages of the technology for manufacturing small-sized products of microsystem hardware on the base of unpackaged MEMS elements. Besides, it gives the results of research into processes of plated-through holes formation in silicon interconnection boards, as well as designs of domestic accelerometers developed using 3D microassembly technology.
3D Microassembly Based on Silicon Interconnection Boards and Unpackaged MEMS Elements The paper presents the concept of 3D microassembly technology based on silicon interconnection boards, highlighting the main advantages of the technology for manufacturing small-sized products of microsystem hardware on the base of unpackaged MEMS elements. Besides, it gives the results of research into processes of plated-through holes formation in silicon interconnection boards, as well as designs of domestic accelerometers developed using 3D microassembly technology.
Tags: 3d microassembly accelerometer die embedded component technology mems silicon substrate tsv unpackaged sensitive element акселерометр бескорпусной чувствительный элемент внутренний монтаж коммутационная плата из кремния кристалл мэмс переходное отверстие в кремнии трехмерная микросборка
Gerasimenko Yuliya V., Sergienko Anatoly I., Ermakov Alexander N., Ermakova Alexandra S., Vertyanov Denis V.
New Design and Technology of Wet Processing Operations of Mems and Microassembly Fabrication Modern microelectromechanical systems are miniature complex devices made using the technology of three-dimensional micromechanics. Each stage of wet processing in the MEMS fabrication: cleaning, washing, etching, plating — presupposes certain requirements for the purity of the operations and for the size of the micromachines objects. Conducting wet processing operations on traditional group processing equipment has some drawbacks, which include uneven processing of wafers due to their physical proximity, the accumulation of contaminants in the working solution with possible subsequent contamination of the treated wafers, a decrease in the concentration of the working solution when processing a series of wafers. The development of Russian equipment for the single wafers and substrates processing for the implementation of wet treatment operations in the MEMS and microassemblies fabrication is an important goal, which requires new design effort and technological solutions that meet the requirements and features of the technological process of MEMS fabrication and that are optimized in terms of energy consumption, dimensions, consumption of reagents etc.
New Design and Technology of Wet Processing Operations of Mems and Microassembly Fabrication Modern microelectromechanical systems are miniature complex devices made using the technology of three-dimensional micromechanics. Each stage of wet processing in the MEMS fabrication: cleaning, washing, etching, plating — presupposes certain requirements for the purity of the operations and for the size of the micromachines objects. Conducting wet processing operations on traditional group processing equipment has some drawbacks, which include uneven processing of wafers due to their physical proximity, the accumulation of contaminants in the working solution with possible subsequent contamination of the treated wafers, a decrease in the concentration of the working solution when processing a series of wafers. The development of Russian equipment for the single wafers and substrates processing for the implementation of wet treatment operations in the MEMS and microassemblies fabrication is an important goal, which requires new design effort and technological solutions that meet the requirements and features of the technological process of MEMS fabrication and that are optimized in terms of energy consumption, dimensions, consumption of reagents etc.
Tags: efficiency individual processing microassembly microelectromechanical systems (mems) reactor technochemistry индивидуальная обработка микросборка микроэлектромеханические системы (мэмс) реактор технохимия эффективность
Gusev Evgeniy E., Dedkova Anna A., Djuzhev Nikolay A.
Investigating Mechanical Strength of Multilayer Membranes for MEMS Converters of Physical Quantities The paper presents the design of a stand for determining mechanical strength, mechanical stresses and modulus of elasticity. The stand has been tested using circular membranes of silicon oxide and silicon nitride of various diameters. The magnitude of the biaxial module has been obtained analytically and calculated basing on experimental data. There is a good correlation between the results obtained. An elastic deformation has been shown at an excess pressure of not more than 0.6atm. The critical pressure for each diameter has been determined. It has been shown that circular membranes of different diameters withstand the same value of the external force.
Investigating Mechanical Strength of Multilayer Membranes for MEMS Converters of Physical Quantities The paper presents the design of a stand for determining mechanical strength, mechanical stresses and modulus of elasticity. The stand has been tested using circular membranes of silicon oxide and silicon nitride of various diameters. The magnitude of the biaxial module has been obtained analytically and calculated basing on experimental data. There is a good correlation between the results obtained. An elastic deformation has been shown at an excess pressure of not more than 0.6atm. The critical pressure for each diameter has been determined. It has been shown that circular membranes of different diameters withstand the same value of the external force.
Tags: biaxial young’s modulus mechanical properties mechanical strength mechanical stresses двухосный модуль упругости механическая прочность механические напряжения механические свойства
Erastov D. A., Zhukova Svetlana A., Demin Sergei A., Turkov Vladimir E., Ulyanov Sergei A., Troshin Bogdan V., Ivanov Sergei Yu., Shumilin A. O.
Magnetron Sputtering Deposition of Vanadium Oxide With High TCR The report presents the results of researches on deposition of thin films of vanadium oxide (VOх), received on silicon and alumina substrates by magnetron sputtering. The developed device is able to transfer the resistance of thin films of vanadium oxide (VOх) during the process of deposition.
Magnetron Sputtering Deposition of Vanadium Oxide With High TCR The report presents the results of researches on deposition of thin films of vanadium oxide (VOх), received on silicon and alumina substrates by magnetron sputtering. The developed device is able to transfer the resistance of thin films of vanadium oxide (VOх) during the process of deposition.
Tags: reactive magnetron sputtering uncooled infrared image sensor vanadium oxide (voх). ик-детекторы магнетронное распыление микроболометрическая матрица оксид ванадия (voх) реактивное магнетронное распыление терморезистивный слой
Volkova Catherine I., Manin Pavel A., Popkov Sergey A.
A Method of Minimizing Mechanical Stresses in a Sensitive Element of Micromechanical Devices at Packaging The study highlights the results of mechanical stresses occurred in a sensitive element (SE) under package, as well as mechanical stresses effect on output characteristics based on an exemplary pressure microsensor (PMS). The paper gives data on digital simulation of SE chip strain caused by thermal expansion — compression at packaging SE chip in the support chip-package system. A search has been performed for a support chip structure which makes it possible to reduce mechanical stresses under temperature variations and to assure mechanical decoupling between SE itself and the device package.
A Method of Minimizing Mechanical Stresses in a Sensitive Element of Micromechanical Devices at Packaging The study highlights the results of mechanical stresses occurred in a sensitive element (SE) under package, as well as mechanical stresses effect on output characteristics based on an exemplary pressure microsensor (PMS). The paper gives data on digital simulation of SE chip strain caused by thermal expansion — compression at packaging SE chip in the support chip-package system. A search has been performed for a support chip structure which makes it possible to reduce mechanical stresses under temperature variations and to assure mechanical decoupling between SE itself and the device package.
Tags: microaccelerometer microelectromechanical systems (mems) microsystem technology (mst) pressure microsensor sensitive element support chip микродатчик давления микросистемная техника (мст) микроэлектромеханические системы (мэмс) опорный кристалл чувствительный элемент
Novikov Dmitry V., Onufrienko Andrey P., Gusev Evgeniy E., Djuzhev Nikolay A.
Thermal Converters of Physical Quantities In the modern world, where sensors are an integral part of almost every electronic device, the requirements to converters of physical quantities are constantly growing. MEMS technology has long proven itself in the field of sensor manufacturing which allows us to further improve their performance on the basis of available technological solutions. In this work we consider a family of thermal converters of physical quantities, and various approaches for their optimization.
Thermal Converters of Physical Quantities In the modern world, where sensors are an integral part of almost every electronic device, the requirements to converters of physical quantities are constantly growing. MEMS technology has long proven itself in the field of sensor manufacturing which allows us to further improve their performance on the basis of available technological solutions. In this work we consider a family of thermal converters of physical quantities, and various approaches for their optimization.
Tags: gas flow sensor pressure sensor thermal accelerometer thermal converter thermal sensor датчик давления датчик потока газа тепловой акселерометр тепловой преобразователь тепловой сенсор
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Vernik Petr A.
Complex of Measures Directed at Considerable Reduction of Lead Time and Launching Into Production Time for Advanced Electronic Component Base (ECB) The report analyses the limiting stages and factors in the existing processes of ECB development and production, restricting the reduction of the terms from the approval of the terms of technical task to launching into batch production and the use of new types of components in final products, as well as an increase in the number of import-substituting developments. The concept of constructing these processes has been proposed, based, in particular, on a modular principle of design, wide application of CAD and libraries of standard blocks, development of standard technical processes with the use of three-dimensional microblock structures based on LTCC technology, aimed at qualitative reduction of time costs when creating an advanced domestic ECB both for import substitution purposes and for further development.
Complex of Measures Directed at Considerable Reduction of Lead Time and Launching Into Production Time for Advanced Electronic Component Base (ECB) The report analyses the limiting stages and factors in the existing processes of ECB development and production, restricting the reduction of the terms from the approval of the terms of technical task to launching into batch production and the use of new types of components in final products, as well as an increase in the number of import-substituting developments. The concept of constructing these processes has been proposed, based, in particular, on a modular principle of design, wide application of CAD and libraries of standard blocks, development of standard technical processes with the use of three-dimensional microblock structures based on LTCC technology, aimed at qualitative reduction of time costs when creating an advanced domestic ECB both for import substitution purposes and for further development.
Tags: 3d-structure electronic component base electronic modules import substitution low temperature co-fired ceramic microelectronic products organization of electronic component base development and produc импортозамещение микроэлектронные изделия низкотемпературная совместно обжигаемая керамика организация процесса разработки и производства экб трехмерная конструкция электронная компонентная база электронные модули