rus
Issue #8/2016
A.Denisov, V.Koniakhin
Promising element base for equipment operating in harsh environments
Promising element base for equipment operating in harsh environments
The features of uncommitted logic array (ULA) and gate array (GA) as basis for the implementation of ASIC are considered. The up-to-date 5521 and 5529 GA families and 5503 and 5507 small-scale integration ULA families are presented.
Microelectronics is one of the industries that determine scientific and technical progress of society. Most of the processes associated with the development of microelectronics have pronounced exponential character. Unlike conventional industries, where the creation of faster and better devices with enhanced functionality usually doubles the cost of development and production, in microelectronics the opposite is true: the transition to a new (smaller) technological standards leads to reduction in price with simultaneous increasing functionality of integrated circuits.
In these circumstances, it is urgent to accelerate the development of electronic component base (ECB) for modern electronic equipment (EE), especially of very large scale integrated circuits (VLSIC), which can be divided into two basic classes: generic and application-specific. The first class includes microprocessors, microcontrollers, peripheral devices, storage devices (ROM, RAM, etc.), a series of standard chips, etc., that is, versatile chips, which can be used in various devices and systems. The production volume of chips of this class reaches hundreds of thousands and millions of pieces per year that minimizes the contribution to their cost of design and development.
Application-specific integrated circuit (ASIC) performs specific functions inherent only to a certain type of equipment, and in most cases can’t be used anywhere else. After the end of production of such equipment, there is no need in ASIC intended for it. As a rule, the volume of production of ASICs is directly tied to volume of production of equipment in which they are applied. There is a large range of ASICs with huge production volumes, for example, VLSICs for automotive electronics, household and computer equipment etc. The costs of design and organization of mass production of such chips are easy to pay off. It is the most profitable sector of the market of microelectronics.
However, in modern society there is a need for thousands of types of ASICs, which are produced to meet the needs of specific industries and specific types of electronics. The production volume of such circuits can range from a few dozen to several thousand pieces per year. Ability to develop and produce them largely determines the scientific, technical and defence potential of the country. It is not coincidentally that the sanctions list of the USA against Russia includes the largest enterprises of the domestic microelectronics – Angstrem and Mikron, which are the flagships in the production of specialized VLSICs.
VLSICs, which are used in space equipment and operated under the influence of hard external factors, constitute a special, most complex group among ASICs. Usually, the range of such chips is large, the development time of equipment is limited, and seriality, due to the nature of the equipment, often does not exceed several hundred units per year. Production, as a rule, is intermittent, and the main parts of the cost of the chips are costs of the development of production and expenses of certification and periodic tests for confirmation of the quality level.
Modern ASICs can be divided into three groups: custom IC, field-programmable gate array (FPGA) (FPGA) and semicustom IC based on gate array (GA) or uncommitted logic array (ULA). It is considered that the fully custom chips provide maximum functionality, reliability and resistance to external factors, the minimum cost for mass production, but are not cost effective at low production volumes, as they require the maximum cost in the design and development of production. FPGAs have advantages in the development and debugging of the circuits project in the equipment. At the same time, the additional elements for programming reduce their reliability and increase power consumption. Compared to the custom VLSICs, the cost of FPGAs is significantly higher. Semicustom VLSICs occupy an intermediate position between a fully custom chips and FPGAs. In terms of reliability, power consumption, and resistance to external factors, they are comparable to custom VLSICs, and in terms of the duration of "development – production – supply" cycle they are comparable to FPGA. The production of GA and ULA, as a rule, is maintained for a long time (over 15 years). Additionally, it is necessary to consider that the FPGAs for military and space purposes (of Military and Space quality levels) are not supplied to Russia due to an embargo.
The choice of the method of implementation of specialized VLSICs depends on many factors, but, as a rule, the semicustom chips provide the best balance of operational and economic performance. Let’s consider the features of GA and ULA as the basis for the implementation of ASICs.
DESIGN OF ULA
Uncommited logic array (ULA) is a versatile workpiece in the form of a silicon wafer with the chips with a matrix of transistor structures. All photomasks for the manufacture of such chips, except for metallization layers, are constant and do not depend on the implemented scheme. The simplest elements (CMOS transistors) are arranged in a regular array. Unlike FPGAs, the logic of which is set by software-controlled items, the specialization of ULA is technologically formed in the process of microelectronic production. Production of specific VLSIC consists in accomplishment of the final manufacturing operations on silicon wafers with ULAs. The CMOS transistors on the array are switched in one or more layers of metallization for the formation of the circuit. Compared to FPGAs, the structure of ULA does not contain redundant elements, which greatly reduces the overall complexity of the circuit and increases its reliability.
ULA includes floor surrounded by the region of the peripheral contacts. To define the size of the ULA the concept of "equivalent gate" is used. One equivalent gate corresponds to the four CMOS transistors which can realize 2AND-NOT or 2OR-NOT logical functions. It is necessary to distinguish between the actual ULA size and the number of equivalent gates that can be used to implement ASIC. The ratio of used equivalent gates to the size of ULA is the fill factor.
The complexity of chips that are implemented on the ULA is determined by many factors: the size of ULA, the amount of external contacts, efficiency of design tools, level of the library of functional cells and their performance, cooling capabilities in hardware, and many others. In practice we cannot use 100% of the ULA area. When fill factor is less than 70%, as a rule, it is possible to design the topology automatically by CAD tools without the participation of the developer. In case of a larger fill factor the topology is designed in an interactive mode with the participation of the developer. This complicates the design process, but allows the use of smaller chip size, the production of which will be cheaper. So typically the families of ULAs are developed. The family includes several structurally similar ULAs with a common library of functional cells and different size of the floor and number of external contacts. For each larger type of ULA in family the floor size usually increases approximately twice. The ULA family can also consist of one size of the chip manufactured in different types of packages.
The ULA design is usually based on a 4-transistor cells. These cells allow to efficient use the resources of ULA and to implement any circuit solution. However, the ULA may include cells of different sizes or regularly repeated transistor structures.
The most widely used ULAs have row or sea-of-gates structure. ULA with row structure consists of a sequence of columns or rows of cells and channels for the wiring (Fig.1a). ULA of sea-of-gates type has a regular structure of identical cells (Fig.1b).
DESIGN OF GA
ULAs are characterized by significant limitations, which are caused by the use of similar transistors that are intended to build circuits of digital processing, but does not allow to implement complex analog and other circuits with special features.
This drawback is eliminated by the use of the GA. Modern GA has a fixed peripheral area, usually coinciding with the peripheral area of ULA, but in GA only chains of power supply of the chip are fixed. This allows to create on the base of GA not only arrays of different digital transistors similar to ULA, but also other circuits (Fig.2).
It should be noted that ULA is actually a special kind of GA, when all the area is occupied by cells of the digital transistors.
The possibility of implementation in GA of the arrays of transistors of different power allows to increase the frequency of the triggers more than twice, which enhances the system frequency of information processing, and also minimizes the area of the circuit.
Usually ULA and GA create a basis for IP cores that implement various functions, such as microprocessor cores, microcontrollers, memory blocks, interface blocks, analog-to-digital processing and many others. It is very important that the library of IP Cores may be created gradually in the process of operation of the ULA and GA families, as an additional result of the designing of specific VLSICs, and the use of proven IP Cores allows to improve the quality of development and to reduce the costs of design of the chip.
It should be noted that the up-to-date technological basis both on bulk silicon and silicon on insulator structures allow to create the GA with increased resistance to external factors, including for equipment for space applications.
Thus, ULA and GA are the most promising solutions for the creation of ASICs, especially with high requirements for reliability in harsh environments. Let’s consider the modern 180 nm and 250 nm 5521 and 5529 GA families [1–4], and small scale integration 5503 and 5507 ULA families. These GA and ULA form a group of families with a common library of functional cells, similar design tools and types of packages. Their distinctive feature is high resistance to space conditions.
5521 AND 5529 ULA/GA FAMILIES
ULA and GA of 5529 family are manufactured using 0.25 µm CMOS technology on the silicon on insulator (SOI) structures, and 5521 GA family – using 0.18 µm technology on bulk silicon. The supply voltage is 3 V ± 10% or 3.3 V ± 10%, the estimated delay time per gate is 100 ps, clock frequency of the D-type flip-flop in the counting mode is 500 MHz.
5529 ULA family meet the requirements of the ОСТ В 11 0998, are produced by SMC "Technological Centre" with the manufacture of chips at Mikron plant, and are included in the list of products permitted for use by МОП 44 001.02. In 2017, the production of ten types of GA of 5529 and 5521 families will be launched. Increased resistance to the single charged particles is provided for 5529 family by the use of SOI technology, and for 5521 family – by the use of triplicated triggers.
Specifications of 5529 and 5521 ULA/GA families are shown in table.1.
5503 AND 5507 ULA FAMILIES
Small scale integration 5503 and 5507 ULA families are more than 15 years widely used in equipment for space applications. ULAs of this families are a base for more than 500 types of VLSICs including such spacecraft and ships as Progress-M, Soyuz-TMA, Meridian, Labyrinth, etc.
5503 and 5507 families have the same design and are manufactured by 1.6 µm CMOS technology. Each family consist of four standard sizes of ULA, which are manufactured in different types of packages. The supply voltage is 5 V ± 10% or 3 V ± 10%, the average delay time per gate is no more than 2 ns and no more than 3 ns, respectively.
Specifications of these ULA families are shown in table.2.
5503 and 5507 ULA families have a common library of cells [5] with the universal system of notation, which consists of three parts:
• library of core cells (5503), which includes all major groups of logic elements and peripheral elements that provide the functions of input, output and input/output of digital and analog signals, passive or active assignment of external contact;
• library of digital-to-analog cells (5503+) allowing to implement the analog-to-digital processing of signals;
• library of special cells (5503++) developed for the specific requirements of different customers (not available for outside customers).
VLSICs are developed using domestic Сovcheg 3.0 CAD [6]. CAD includes all main subsystems for development and pre-production of semicustom VLSIC. Full industrial version of CAD is available for free copying (http://www.asic.ru) that allows to create in any enterprise or institution full-featured workplaces for development of VLSIC on 5503 and 5507 ULA families. Developed VLSICs can be manufactured by SMC "Technological Centre" (http://www.tcen.ru). ■
This paper was created with the financial support of the Ministry of Education and Science of the Russian Federation. Unique identifier RFMEFI57814X0061.
In these circumstances, it is urgent to accelerate the development of electronic component base (ECB) for modern electronic equipment (EE), especially of very large scale integrated circuits (VLSIC), which can be divided into two basic classes: generic and application-specific. The first class includes microprocessors, microcontrollers, peripheral devices, storage devices (ROM, RAM, etc.), a series of standard chips, etc., that is, versatile chips, which can be used in various devices and systems. The production volume of chips of this class reaches hundreds of thousands and millions of pieces per year that minimizes the contribution to their cost of design and development.
Application-specific integrated circuit (ASIC) performs specific functions inherent only to a certain type of equipment, and in most cases can’t be used anywhere else. After the end of production of such equipment, there is no need in ASIC intended for it. As a rule, the volume of production of ASICs is directly tied to volume of production of equipment in which they are applied. There is a large range of ASICs with huge production volumes, for example, VLSICs for automotive electronics, household and computer equipment etc. The costs of design and organization of mass production of such chips are easy to pay off. It is the most profitable sector of the market of microelectronics.
However, in modern society there is a need for thousands of types of ASICs, which are produced to meet the needs of specific industries and specific types of electronics. The production volume of such circuits can range from a few dozen to several thousand pieces per year. Ability to develop and produce them largely determines the scientific, technical and defence potential of the country. It is not coincidentally that the sanctions list of the USA against Russia includes the largest enterprises of the domestic microelectronics – Angstrem and Mikron, which are the flagships in the production of specialized VLSICs.
VLSICs, which are used in space equipment and operated under the influence of hard external factors, constitute a special, most complex group among ASICs. Usually, the range of such chips is large, the development time of equipment is limited, and seriality, due to the nature of the equipment, often does not exceed several hundred units per year. Production, as a rule, is intermittent, and the main parts of the cost of the chips are costs of the development of production and expenses of certification and periodic tests for confirmation of the quality level.
Modern ASICs can be divided into three groups: custom IC, field-programmable gate array (FPGA) (FPGA) and semicustom IC based on gate array (GA) or uncommitted logic array (ULA). It is considered that the fully custom chips provide maximum functionality, reliability and resistance to external factors, the minimum cost for mass production, but are not cost effective at low production volumes, as they require the maximum cost in the design and development of production. FPGAs have advantages in the development and debugging of the circuits project in the equipment. At the same time, the additional elements for programming reduce their reliability and increase power consumption. Compared to the custom VLSICs, the cost of FPGAs is significantly higher. Semicustom VLSICs occupy an intermediate position between a fully custom chips and FPGAs. In terms of reliability, power consumption, and resistance to external factors, they are comparable to custom VLSICs, and in terms of the duration of "development – production – supply" cycle they are comparable to FPGA. The production of GA and ULA, as a rule, is maintained for a long time (over 15 years). Additionally, it is necessary to consider that the FPGAs for military and space purposes (of Military and Space quality levels) are not supplied to Russia due to an embargo.
The choice of the method of implementation of specialized VLSICs depends on many factors, but, as a rule, the semicustom chips provide the best balance of operational and economic performance. Let’s consider the features of GA and ULA as the basis for the implementation of ASICs.
DESIGN OF ULA
Uncommited logic array (ULA) is a versatile workpiece in the form of a silicon wafer with the chips with a matrix of transistor structures. All photomasks for the manufacture of such chips, except for metallization layers, are constant and do not depend on the implemented scheme. The simplest elements (CMOS transistors) are arranged in a regular array. Unlike FPGAs, the logic of which is set by software-controlled items, the specialization of ULA is technologically formed in the process of microelectronic production. Production of specific VLSIC consists in accomplishment of the final manufacturing operations on silicon wafers with ULAs. The CMOS transistors on the array are switched in one or more layers of metallization for the formation of the circuit. Compared to FPGAs, the structure of ULA does not contain redundant elements, which greatly reduces the overall complexity of the circuit and increases its reliability.
ULA includes floor surrounded by the region of the peripheral contacts. To define the size of the ULA the concept of "equivalent gate" is used. One equivalent gate corresponds to the four CMOS transistors which can realize 2AND-NOT or 2OR-NOT logical functions. It is necessary to distinguish between the actual ULA size and the number of equivalent gates that can be used to implement ASIC. The ratio of used equivalent gates to the size of ULA is the fill factor.
The complexity of chips that are implemented on the ULA is determined by many factors: the size of ULA, the amount of external contacts, efficiency of design tools, level of the library of functional cells and their performance, cooling capabilities in hardware, and many others. In practice we cannot use 100% of the ULA area. When fill factor is less than 70%, as a rule, it is possible to design the topology automatically by CAD tools without the participation of the developer. In case of a larger fill factor the topology is designed in an interactive mode with the participation of the developer. This complicates the design process, but allows the use of smaller chip size, the production of which will be cheaper. So typically the families of ULAs are developed. The family includes several structurally similar ULAs with a common library of functional cells and different size of the floor and number of external contacts. For each larger type of ULA in family the floor size usually increases approximately twice. The ULA family can also consist of one size of the chip manufactured in different types of packages.
The ULA design is usually based on a 4-transistor cells. These cells allow to efficient use the resources of ULA and to implement any circuit solution. However, the ULA may include cells of different sizes or regularly repeated transistor structures.
The most widely used ULAs have row or sea-of-gates structure. ULA with row structure consists of a sequence of columns or rows of cells and channels for the wiring (Fig.1a). ULA of sea-of-gates type has a regular structure of identical cells (Fig.1b).
DESIGN OF GA
ULAs are characterized by significant limitations, which are caused by the use of similar transistors that are intended to build circuits of digital processing, but does not allow to implement complex analog and other circuits with special features.
This drawback is eliminated by the use of the GA. Modern GA has a fixed peripheral area, usually coinciding with the peripheral area of ULA, but in GA only chains of power supply of the chip are fixed. This allows to create on the base of GA not only arrays of different digital transistors similar to ULA, but also other circuits (Fig.2).
It should be noted that ULA is actually a special kind of GA, when all the area is occupied by cells of the digital transistors.
The possibility of implementation in GA of the arrays of transistors of different power allows to increase the frequency of the triggers more than twice, which enhances the system frequency of information processing, and also minimizes the area of the circuit.
Usually ULA and GA create a basis for IP cores that implement various functions, such as microprocessor cores, microcontrollers, memory blocks, interface blocks, analog-to-digital processing and many others. It is very important that the library of IP Cores may be created gradually in the process of operation of the ULA and GA families, as an additional result of the designing of specific VLSICs, and the use of proven IP Cores allows to improve the quality of development and to reduce the costs of design of the chip.
It should be noted that the up-to-date technological basis both on bulk silicon and silicon on insulator structures allow to create the GA with increased resistance to external factors, including for equipment for space applications.
Thus, ULA and GA are the most promising solutions for the creation of ASICs, especially with high requirements for reliability in harsh environments. Let’s consider the modern 180 nm and 250 nm 5521 and 5529 GA families [1–4], and small scale integration 5503 and 5507 ULA families. These GA and ULA form a group of families with a common library of functional cells, similar design tools and types of packages. Their distinctive feature is high resistance to space conditions.
5521 AND 5529 ULA/GA FAMILIES
ULA and GA of 5529 family are manufactured using 0.25 µm CMOS technology on the silicon on insulator (SOI) structures, and 5521 GA family – using 0.18 µm technology on bulk silicon. The supply voltage is 3 V ± 10% or 3.3 V ± 10%, the estimated delay time per gate is 100 ps, clock frequency of the D-type flip-flop in the counting mode is 500 MHz.
5529 ULA family meet the requirements of the ОСТ В 11 0998, are produced by SMC "Technological Centre" with the manufacture of chips at Mikron plant, and are included in the list of products permitted for use by МОП 44 001.02. In 2017, the production of ten types of GA of 5529 and 5521 families will be launched. Increased resistance to the single charged particles is provided for 5529 family by the use of SOI technology, and for 5521 family – by the use of triplicated triggers.
Specifications of 5529 and 5521 ULA/GA families are shown in table.1.
5503 AND 5507 ULA FAMILIES
Small scale integration 5503 and 5507 ULA families are more than 15 years widely used in equipment for space applications. ULAs of this families are a base for more than 500 types of VLSICs including such spacecraft and ships as Progress-M, Soyuz-TMA, Meridian, Labyrinth, etc.
5503 and 5507 families have the same design and are manufactured by 1.6 µm CMOS technology. Each family consist of four standard sizes of ULA, which are manufactured in different types of packages. The supply voltage is 5 V ± 10% or 3 V ± 10%, the average delay time per gate is no more than 2 ns and no more than 3 ns, respectively.
Specifications of these ULA families are shown in table.2.
5503 and 5507 ULA families have a common library of cells [5] with the universal system of notation, which consists of three parts:
• library of core cells (5503), which includes all major groups of logic elements and peripheral elements that provide the functions of input, output and input/output of digital and analog signals, passive or active assignment of external contact;
• library of digital-to-analog cells (5503+) allowing to implement the analog-to-digital processing of signals;
• library of special cells (5503++) developed for the specific requirements of different customers (not available for outside customers).
VLSICs are developed using domestic Сovcheg 3.0 CAD [6]. CAD includes all main subsystems for development and pre-production of semicustom VLSIC. Full industrial version of CAD is available for free copying (http://www.asic.ru) that allows to create in any enterprise or institution full-featured workplaces for development of VLSIC on 5503 and 5507 ULA families. Developed VLSICs can be manufactured by SMC "Technological Centre" (http://www.tcen.ru). ■
This paper was created with the financial support of the Ministry of Education and Science of the Russian Federation. Unique identifier RFMEFI57814X0061.
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