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Special Issue/2019
A. V. Andrianov
Practical ways of optimizing regression testing of “system-on-chip” projects
Practical ways of optimizing regression testing of “system-on-chip” projects
The article describes a set of practical ways to reduce time costs when developing and debugging test scenarios of “system-on-chip” VLSI, as well as when optimizing regression testing. The article covers issues of picking optimal hardware for the task, fine-tuning operating system, designing the testbench and using select features from Cadence Xcellium software package.
The article describes a set of practical ways to reduce time costs when developing and debugging test scenarios of “system-on-chip” VLSI, as well as when optimizing regression testing. The article covers issues of picking optimal hardware for the task, fine-tuning operating system, designing the testbench and using select features from Cadence Xcellium software package.
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